8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

I ---------.~----------~
I LOW-PASS i
r----------------------------------------------------------------~I FILTER I
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r--1~--'
I
CURRENT­
CONTROLLED
L
OSCILLATOR
(CCO)
I--------~
I I I
COUNTER #1
(FEEDBACK)
BIPOLAR LSI DIVISION
r--~Dr--,
I I
CRYSTAL
OSCILLATOR
WRITE
..--0
READ
C~:~~
~- I
r-'----.......
LOAD
COUNTER #2
(REFERENCE)
CARRY 1
CARRY 2
'-.,r---+--I
PHASE
DETECTOR
PUMP-UP
PUMP-DOWN
DATA
FLIP-FLOPS
(PULSE
SYNCHRONIZER)
t CLOCK
NOTE
Components shown with dashed lines are located off-chip
CLOCK/DATA
SEPARATION
LOGIC
t DATA/CLOCK
WINDOWS
Figure 4. Simplified Block of Phase-Lock Loop
DATA
~
i
~ 4
Z
~ 3
MAXIMUM
PHASE DEVIATION
/ FOR BOTH DATA
AND CLOCK
MAXIMUM
PHASE
DEVIATION
FOR DATA
3.5 2.5 1.5 PHASE DEVIATION
-+---r--;---+-~~~---1r.5--2~.S---3+.S--4~.rS---~::~~~~~ROM
(LATE)
MAXIMUM
PHASE DEVIATION
FOR BOTH DATA
AND CLOCK
(EARLY)
NOMINAL DATA
PHASE DEVIATION
4-----4+.S---3r.S--2~.S---+--~;-+---1.rS--2~.S---3+S--4~~--.~::~~~~~ROM
NOMINAL DATA
(LATE) 1 ~ (EARLY)
MAXIMUM
PHASE DEVIATION
FOR DATA
2 ~
C
3~
iii
41
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sri.
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II.
NOTE
All horizontal/vertical units are specified in ceo clock periods; for
Standard Floppy FM Format, one ceo clock period equals 250
nanoseconds
NOTE
All horizontallvertical units are specified in ceo clock periods; for
standard floppy double density (MFM/M2FM), one ceo clock period
equals 125 nanoseconds
Figure 5.
Phase Detector Characteristic for
Single-Density (FM) Format
Figure 6. Phase Detector Characteristic for
Double-Density (MFM/M2FM) Format
10
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