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8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

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1137/9133/1135/113&<br />

Ill/1136/IX4,<br />

BIPOLAR LSI DIVISION<br />

VOLTAGE WAVEFORMS (Cont'd)<br />

DATA DELAY TIMES<br />

Input Data Reference<br />

DATA DELAY TIMES<br />

Clock Referenced<br />

BIC<br />

INPUT<br />

DATA<br />

MCLK<br />

OUTPUT<br />

DATA<br />

-tPD--II<br />

g~i~UT ___ ."<br />

/1.5V<br />

- tpD \-1<br />

\5V<br />

-----<br />

SETUP AND HOLD TIMES<br />

---------"'X.:--------<br />

MCLK<br />

BIC - - - - ~ "'7 sE-;u:-I- tHoLD-1<br />

DATA AND<br />

CONTROL<br />

---, r----<br />

\ /<br />

OUTPUT ENABLE AND DISABLE TIMES<br />

(Three-State Outputs)<br />

J\<br />

* ,..-----<br />

CONTROL \ 1/<br />

OUTPUT 1.SV 1.5V<br />

DATA<br />

OUTPUT 1<br />

DATA<br />

OUTPUT 2<br />

LOW LEVEL<br />

ENABLING<br />

I \ 'I ~~~~t~NVGEL<br />

'-_1_____ -../ I ~---<br />

l-tOE---I<br />

~tOD...J<br />

I I I<br />

I I<br />

"'-'-~":"""':"~____<br />

r-I ~~'-'-- -VOL<br />

Waveform #1 is for an output with internal conditions such that the<br />

output is Low when the three-state driver is enabled. Waveform #2 is<br />

for the opposite condition.<br />

8<br />

G!!)OOtiCG

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