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8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

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The function of the operand fields vary according to the instruction<br />

. to be performed. Table 2-1 provides a summary of operand field<br />

functions in order of instruction called for. More detailed<br />

information on this subject is available in the Signetics 8X300<br />

Programming Manual.<br />

Table 2-1. Operand Field Functions<br />

OPERAND FIELD FUNCTION<br />

I NSTR UCTIONS A B C<br />

BITS 3-7 BITS 8-10 BITS 11-15<br />

MOVE}<br />

ADD<br />

AND<br />

XOR<br />

MOVE}<br />

ADD<br />

AND<br />

XOR<br />

XEC<br />

NZT<br />

XEC<br />

NZT<br />

}<br />

}<br />

XMIT<br />

}<br />

XMIT<br />

}<br />

REGISTER TO REGISTER<br />

REGISTER TO IV BUS ADDRESS<br />

REGISTER TO IV BUS<br />

IV BUS TO REGISTER<br />

IV BUS TO IV BUS<br />

IV BUS TO IV BUS ADDRESS<br />

SOURCE ROTATE DESTINATION<br />

SOURCE LENGTH DESTINATION<br />

REGISTER SOURCE LOCAL ADDRESS<br />

IV BUS SOURCE LENGTH LOCAL ADDRESS<br />

REGISTER<br />

IV BUS ADDRESS<br />

DESTINATION<br />

IV BUS DESTINATION LENGTH<br />

LITERAL CONSTANT<br />

LITERAL<br />

CONSTANT<br />

.JVIP<br />

ADDRESS<br />

2.1.2 Arithmetic Logic Unit<br />

Referring to Figure 2-3, the Arithmetic Logic Unit (ALU) receives<br />

its A-bus inputs from internal registers or I/O (through Rotate/Mask<br />

logic) and its B-bus inputs from either the Instruction Register<br />

CIR8-IR15) or from the Accumulator (a register containing an exact<br />

duplicate of the information contained in the Auxiliary Register,<br />

RO) via a multiplexer. The ALU performs one of four functions on<br />

2-4

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