8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

1.2 DESIGN AD V ANT AGES OF THE SIGNETICS 8X300 MICROCONTROLLER
The Signetics 8X300 Microcontroller comprises three separate
buses: a non-multiplexed 13-bit Instruction Address bus, a
non-multiplexed 16-bit Instruction Data bus, and a multiplexed
3-state, 8-bit I/O bus. This dedicated bus structure contributes to
the speed and flexibility of the device by allowing more actions to
over lap. In brief, the 8X300 offers the designer a degree of speed
and versatility previously available only with bit-slice architecture.
The 8X300 may select as its data source either the user I/o bus or
one of eight internal read/write registers. Previous to performing
the instructed function, the designer can manipulate source data
using both rotate and mask functions. The results of the instructed
function may then be shifted, masked and merged with the original
source data prior to output. All of the above-mentioned operations
can be totally executed in 250 nanoseconds, accounting for the
designers ability to process 1- to 8-bit variables as easily as MOS
microprocessors handle byte-oriented data.
Although the instruction set of the Signetics 8X300 Microcontroller
contains only eight major catagories of instructions, a variable
operand field within these instructions provides the designer with an
extensive set of unique instructions. The inherent simplicity of the
instruction set allows several hundred lines of machine code to be
written by hand. Where more complex programs are required, a
cross assembly program, MCCAP, is available. MCCAP allows the
system designer to construct well-documented firmware readily
employing all the powerful features of the 8X300 architecture.
The on-chip oscillator and timing generators of the device require
only a crystal or single capacitor for reliable operation. If the
Signetics 8X300 is to be operated from an external TTL clock, all
that is required is an inverting buffer, a non-inverting buffer and
two resistors. The device requires only a single plus fi ve-volt power
supply for its operation, and its inputs and outputs are TTL.
Figure 1-2 illustrates a typical system configuration.
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