17.05.2015 Views

8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

In total, eight interupt requests may be given. As an example,<br />

INTREQA is chosen as an edge-trigger interrupt while INTREQH is<br />

treated in a handshake procedure.<br />

The eight interrupt request signals, INTREQA through INTREQH,<br />

either trigger an interrupt flip-flop or feed directly into a masking<br />

gate, with which it is possible to inhibit one or more chosen levels.<br />

G-<br />

0-<br />

7474<br />

INTFPA<br />

A- - C<br />

INTREO _ 0 _<br />

'5V<br />

R<br />

rc:.. ............. 1_.1..,-,1 INTERRUPT SIGNAL<br />

I }- 7<br />

r--------L...._,~<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

I<br />

- 6<br />

EO GS<br />

CLEAR<br />

- 5 - 40 40 ........<br />

MCLK -<br />

l<br />

INTERRUPT ~<br />

CODE<br />

- -=-<br />

-4 A2 f--- 3D 301---+--1-+-1 A<br />

-3<br />

-2<br />

I<br />

...<br />

-1<br />

or+~~~~+-D-' O<br />

RESET--_--<br />

INT<br />

MASK<br />

74148 74175<br />

__ ~~<br />

El<br />

+--,<br />

1 -'-<br />

~ -<br />

I \<br />

'T~<br />

I<br />

I<br />

I<br />

_1-<br />

INTERRUPT<br />

INHIBIT<br />

A1 ~ 20<br />

A0t-- 10<br />

CLOCK<br />

201---~+-IB<br />

101----~C<br />

G2A<br />

7413B<br />

I<br />

C<br />

7474<br />

ACKN-H - -H<br />

o S 0 f-<br />

~""""",,""'I<br />

G2B~<br />

Y7<br />

I<br />

I<br />

I<br />

I<br />

I<br />

;<br />

1<br />

G1 YO~~t---- AA<br />

T ~<br />

~ ______---1 ACKNOWLEDGE<br />

INTERRUPT<br />

ACKNOWLEDGE<br />

1<br />

I<br />

1<br />

I<br />

1<br />

Figure 2-38. Priority Interrupt Level Logic<br />

INT MASK signals come from an I/O port, so that masking may be<br />

done by software. A general interrupt inhibit may be applied if a<br />

signal is fed to the EI input of the encoder. If this is not requried,<br />

the EI input should be tied to ground. The priority of the incoming<br />

interrupts is determined in the priority encoder. If at least one<br />

interrupt request is active at the input of the encoder, an<br />

INTERRUPT signal is generated for the Interrupt Control (Figure<br />

2-32). The code of the acti ve interrupt with the highest priority is<br />

clocked into the flip-flops of the 74175, coincident with the<br />

INTERRUPT ACKNOWLEDGE from Interrupt Control.<br />

2-57

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!