8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge

PRODUCT IDENTITY
aT32- Three-state, field-programmable
(addresses 0-255), synchronous
user port
aX32- Three-state, preprogrammed addresses
(0-15), synchronous user
port in slim-line (0.4 in.) package
aT33- Open-collector, synchronous user
port
aT35- Open-collector, asynchronous
user port
aT36- Three-state, field-programmable
(addresses 0-255), asynchronous
user port
aX36- Three-state, preprogrammed addresses
(0-15), asynchronous user
port In slim-line (0.4 in.) package
aX42- Three-state, 4-inputl4-output, preprogrammed
addresses (0-15),
synchronous user port
ORDERING INFORMATION
All of the above parts can be ordered as
field-programmable or with addresses preassigned
at the factory. To order, use the
following part-number format.
N8XYY-ZZZ-P
N8TYY-ZZZ-P
where,
P = F for Ceramic package and
NA for Plastic package
ZZZ = Any address from 000 through 255 (decimalJ-256
available addresses·for each 8T-- part. For an ax-­
part, preassigned addresses are limited to 000
through 015 (decimalJ-16 available addresses.
YY = 1/0 port version.
FEATURES
• Dual bidirectional ports (except SX42)
• Independent port operation (user-port
priority for data entry)
• User data input available as synchronous
(ST32/aX32/aX42/aT33) or as asynchronous
(aT35/aT36/aX36)
• User data bus available with three-state
(aT32/aX32, aT36/aX36, and/or aX42) or
open-collector (aT33 and/or aT35) outputs
• At power-up, user-port outputs are high
and microprocessor-port outputs are
high-z; status latch (from address compare)
is also cleared at power-up
• Three-state TTL outputs for high-drive
capabilities
• Directly compatible with aX300 microcontroller
• Single +5V supply
• Slim (0.4 in.) 24-pin DIP (aX32/
aX36/aX42 only)
A stock of 8T32s and 8T36s with addresses
"1" through "10" are maintained in inventory;
with a longer lead time, a small quantity
of addresses "11" through "50" are also
available.
113211133!113S/1136
111211136,'1142
PIN CONFIGURATION
BIPOLAR LSI DIVISION
UD7 1 24 VCC
UD6 2 23 IV7
UD5 3 22 IV6
UD4 4 21 IV5
UD3 5 20 IV4
UD2 6 19 IV3
UD1 7 18 IV2
UDO 8 17 IV1
BOC 9 16 IVO
BIC 10 15 WC
ME 11 14 SC
GND 12 13 MCLK
PRODUCT DESCRIPTIONS
aT32JST33/ST35/ST36. Each of these I/O
Bytes is an addressable and bi-directional
register designed for use as an interface
element in any system with TTL-compatible
buses. (Note. Since these I/O Bytes are
frequently used with the 8X300 Microcontroller
and its associated Interface Vector
bus, the 8T32-8T36 family of parts are commonly
callecfW Bytes') Each I/O Byte contains
eight identical data latches (Bits 0
through 7); the latches are accessed from
either of two 8-bit ports-one port connecting
to the microprocessor (8X30Q) and the
other port connecting to the user device.
Separate controls are provided for each port
and the two ports operate independently,
except when both attempt to input data at
the same time; in this case, the user port bus
has priority.
The address of each 110 Byte is fieldprogrammable
and the microprocessor port
is accessed when a valid address is received;
the user port is accessible at all
times. A. selected Byte is automatically deselected
when the address of another I/O
Byte is sensed on the address/data bus. A
Master Enable (ME) input is available for use
as a ninth address bit, allowing direct ae-
cess to 512 I/O Bytes without address decoding.
A unique feature of these parts is their
ability to start up in a predetermined state. If
the clock is maintained at a level of less than
0.8 volts until the power supply reaches 3.5
volts, all bits of the user port will wakeup at a
"logic 1" level and those of the microprocessor
port will wakeup in the high-impedance
state.
aX32/aX36. Except for package differences
and the fact that the 8X32 and 8X36 are
available with preprogrammed addresses (0
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