8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge
8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge
8x300 design guide - Al Kossow's Bitsavers - Trailing-Edge
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This method of fast I/o port selection is suitable for use in small<br />
systems. It can be used in the same system with normal select I/o<br />
(such as 8X32s), but when using fast I/O select the programmer must<br />
ensure that a programmable I/O port has not been left selected on<br />
the bank in use.<br />
On large systems extra delays may be encountered, with the result<br />
that it may be necessary to program the I/O port enable address in<br />
the instruction preceding its usage. A double set of D-latches are<br />
used as address hold latches to insure that the address appears<br />
sufficiently early in the instruction cycle. Refer to Figure 2-25.<br />
TO IV BYTES{<br />
MASTER<br />
ENABLE -a BIT<br />
BIT N<br />
1<br />
}<br />
EXTRA BITS<br />
ADDED FOR<br />
FAST SelECT<br />
ROM<br />
BANK SelECT<br />
1/0 BUS<br />
16<br />
INSTRUCTION ..... +----11<br />
8X300<br />
Figure 2-25. Fast I/O Select For Large Systems<br />
In both examples, Figures 2-24 and 2-25, the program memory<br />
extension is usually made in increments of four or eight bits. If only<br />
one I/O port is to be enabled, then the remaining extension bits may<br />
be used for other control or display drive functions. If, on the other<br />
hand, a maximum of eight extension bits are decoded, this allows<br />
I/O port selection from up to 256 ports.<br />
2-41