Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

Chapter 8
EXPLORING SW PERFORMANCE USING SOC
TRANSACTION-LEVEL MODELING
Imed Moussa, Thierry Grellier and Giang Nguyen
Abstract. This paper presents a Virtual Instrumentation for System Transaction (VISTA), a new
methodology and tool dedicated to analyse system level performance by executing full-scale SW
application code on a transaction-level model of the SoC platform. The SoC provider provides
a cycle-accurate functional model of the SoC architecture using the basic SystemC Transaction
Level Modeling (TLM) components provided by VISTA : bus models, memories, IPs, CPUs,
and RTOS generic services. These components have been carefully designed to be integrated
into a SoC design flow with an implementation path for automatic generation of IP HW
interfaces and SW device drivers. The application developer can then integrate the application
code onto the SoC architecture as a set of SystemC modules. VISTA supports cross-compilation
on the target processor and back annotation, therefore bypassing the use of an ISS. We
illustrate the features of VISTA through the design and simulation of an MPEG video decoder
application.
Key words: Transaction Level Modeling, SoC, SystemC, performance analysis
1. INTRODUCTION
One of the reasons for the focus on SW is the lagging SW design productivity
compared to rising complexity. Although SoCs and board-level designs
share the general trend toward using software for flexibility, the criticality of
the software reuse problem is much worse with SoCs. The functions required
of these embedded systems have increased markedly in complexity, and the
number of functions is growing just as fast. Coupled with quickly changing
design specifications, these trends have made it very difficult to predict
development cycle time. Meanwhile, the traditional embedded systems
software industry has so far not addressed issues of “hard constraints,” such
as reaction speed, memory footprint and power consumption, because they
are relatively unimportant for traditional, board-level development systems
[1–4]. But, these issues are critical for embedded software running on SoCs.
VISTA is targeted to address the system-level design needs and the SW design
reuse needs for SoC design.
A Jerraya et al. (eds.), Embedded Software for SOC, 97–109, 2003.
© 2003 Kluwer Academic Publishers. Printed in the Netherlands.
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