Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

10 Chapter 1
4. CONCLUSIONS
In this paper we have showed that the process of capturing system functionalities
at high-level of abstraction for automatic code generation is consistent.
In particular high-level system descriptions have the same behavior of
the execution of code automatically generated from the same high-level
descriptions.
This link to implementation is a key productivity improvement as it allows
implementation code to be derived directly by the models used for system
level exploration and performance evaluation. In particular an accuracy error
less than 1% and maximum execution speed reduction of about 11.8% has
been reported. We recognize this overhead to be acceptable for the implementation
code of our system.
Starting from these results‚ the presented design flow can be adopted to
develop and evaluate software on high-level model architecture‚ before target
chip will be available from foundry.
At present this methodology is in use to compare software performances
of different RTOSs on our speech recognition platform. This to evaluate which
one could best fit different speech application target constraints.
ACKNOWLEDGEMENTS
The authors thank M. Selmi‚ L. CalÏ‚ F. Lertora‚ G. Mastrorocco and A. Ferrari
for their helpful support on system modeling. A special thank to P.L. Rolandi
for his support and encouragement.
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