Embedded Software for SoC - Grupo de MecatrÃ´nica EESC/USP

More documents

Recommendations

Info

INDEX abstract communication access latency of cache access pattern address computation AES affine condition affinity AHB multi-layer analyzable reference APIs APOS application hotspots Application Specific Instruction-Set Processor (ASIP) architecture mapping architectural model ARM core array-based applications array interleaving assembly assertion checker assertion language automatic and application-specific design of HAL automation automotive automotive software bandwidth bank switching banked memory banking of cache behavioral model bit patterns in data bit-flips Bitline scaling Buffer Overflows Bus Models cache cache bypassing cache effects cache optimization cache performance call-by-need certifiable software chip-scale parallelism clock gateing clustered co-design co-scheduling code generation communication channels communication refinement communication scheduling communications compilers computation reuse concurrency configurable processor configurability context switching control flow coprocessor selection coroutines correct by construction code synthesis COTS cryptography data assignment data dependency data reuse data transformation data upsets data-dominated data-flow analysis debugging design design flow design space exploration detection efficiency device driver device driver synthesis device programming interface distributed real-time systems dynamic behavior dynamic C dynamic parallelization dynamic power management 527
528 Index dynamic scheduling dynamic voltage scaling eCOS effect-less electronic control unit certification embedded benchmarks embedded OS embedded processor embedded processors embedded RTOS embedded software embedded software streaming embedded systems energy consumption energy efficiency EPIC error containment error rate Ethernet event driven finite state machine event handling fault containment fault tolerance filesystem flow aggregation formal timing analysis framework functional unit assignment genetic algorithm HAL standard hardware abstraction layer hardware dependent software hardware detection hardware software interface synthesis hardware/software co-design hardware/software optimization hardware/software partitioning hash table high associativity high performance HW/SW partitioning If-statement ILP extraction inte-processor communication interactive ray tracing Intermediate representation interrupt handling intervals instruction reuse Instruction selection IP based embedded system design iSSL Kahn process network kernel libraries link to implementation load balance locality locality improvement Logic of Constraints (LOC) loop iteration loop nest splitting loop optimization loop transformation low energy low power mapping marking equation memory layouts memory recycling middleware microcontroller model refinement modeling modulo scheduling MP SoC multi-media applications multi-processor,multi-tasked applications Multi-rate Multimedia multiprocessor embedded kernel multiprocessor SoC multitasking multithread nested-loop hierarchy network processors network-on-chip networking on-chip communication on-chip communicationanalyzable reference on-chip generic interconnect on-chip multiprocessing on-demand computation on-line checkpointing on/off instructions, operating systems optimization OS-driven Software
Page 2 and 3:
EMBEDDED SOFTWARE FOR SoC
Page 4 and 5:
Embedded Software for SoC Edited by
Page 6 and 7:
DEDICATION This book is dedicated t
Page 8 and 9:
TABLE OF CONTENTS Dedication Conten
Page 10 and 11:
Table of Conents Chapter 16 EMBEDDE
Page 12 and 13:
Table of Conents Chapter 33 ADAPTIV
Page 14 and 15:
PREFACE The evolution of electronic
Page 16 and 17:
INTRODUCTION Embedded software is b
Page 18 and 19:
Introduction xvii software consists
Page 20 and 21:
Introduction xix Energy-aware techn
Page 22 and 23:
PART I: EMBEDDED OPERATING SYSTEMS
Page 24 and 25:
Chapter 1 APPLICATION MAPPING TO A
Page 26 and 27:
Application Mapping to a Hardware P
Page 28 and 29:
Page 30 and 31:
Page 32 and 33:
Chapter 2 FORMAL METHODS FOR INTEGR
Page 34 and 35:
Formal Methods for Integration of A
Page 36 and 37:
Page 38 and 39:
Page 40 and 41:
Page 42 and 43:
Page 44 and 45:
Page 46 and 47:
Chapter 3 LIGHTWEIGHT IMPLEMENTATIO
Page 48 and 49:
Lightweight Implementation of the P
Page 50 and 51:
Page 52 and 53:
Page 54 and 55:
Page 56 and 57:
Page 58 and 59:
Page 60 and 61:
Chapter 4 DETECTING SOFT ERRORS BY
Page 62 and 63:
Detecting Soft Errors by a Purely S
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
PART II: OPERATING SYSTEM ABSTRACTI
Page 76 and 77:
Chapter 5 RTOS MODELING FOR SYSTEM
Page 78 and 79:
RTOS Modeling for System Level Desi
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Chapter 6 MODELING AND INTEGRATION
Page 92 and 93:
Modeling and Integration of Periphe
Page 94 and 95:
Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Chapter 7 SYSTEMATIC EMBEDDED SOFTW
Page 106 and 107:
Systematic Embedded Software Genera
Page 108 and 109:
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
PART III: EMBEDDED SOFTWARE DESIGN
Page 118 and 119:
Chapter 8 EXPLORING SW PERFORMANCE
Page 120 and 121:
Exploring SW Performance 99 of late
Page 122 and 123:
Exploring SW Performance 101 operat
Page 124 and 125:
Exploring SW Performance 103 The ch
Page 126 and 127:
Exploring SW Performance 105 2.2. T
Page 128 and 129:
Exploring SW Performance 107 Figure
Page 130 and 131:
Exploring SW Performance 109 modem
Page 132 and 133:
Chapter 9 A FLEXIBLE OBJECT-ORIENTE
Page 134 and 135:
A Flexible Object-Oriented Software
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Chapter 10 SCHEDULING AND TIMING AN
Page 148 and 149:
Analysis of HW/SW On-Chip Communica
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Chapter 11 EVALUATION OF APPLYING S
Page 160 and 161:
Evaluation of Applying SpecC to the
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Page 172 and 173:
Chapter 12 INTERACTIVE RAY TRACING
Page 174 and 175:
Interactive Ray Tracing on Reconfig
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Chapter 13 PORTING A NETWORK CRYPTO
Page 188 and 189:
Porting a Network Cryptographic Ser
Page 190 and 191:
Page 192 and 193:
Page 194 and 195:
Page 196 and 197:
Page 198 and 199:
PART IV: EMBEDDED OPERATING SYSTEMS
Page 200 and 201:
Chapter 14 INTRODUCTION TO HARDWARE
Page 202 and 203:
Introduction to Hardware Abstractio
Page 204 and 205:
Page 206 and 207:
Page 208 and 209:
Chapter 15 HARDWARE/SOFTWARE PARTIT
Page 210 and 211:
Hardware and Software Partitioning
Page 212 and 213:
Page 214 and 215:
Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
Page 222 and 223:
Page 224 and 225:
Page 226 and 227:
Page 228 and 229:
Chapter 16 EMBEDDED SW IN DIGITAL A
Page 230 and 231:
Embedded SW in Digital AM-FM Chipse
Page 232 and 233:
Embedded SW in Digital AM-FM Chipse
Page 234 and 235:
PART V: SOFTWARE OPTIMISATION FOR E
Page 236 and 237:
Chapter 17 CONTROL FLOW DRIVEN SPLI
Page 238 and 239:
Control Flow Driven Splitting of Lo
Page 240 and 241:
Page 242 and 243:
Page 244 and 245:
Page 246 and 247:
Page 248 and 249:
Page 250 and 251:
Page 252 and 253:
Chapter 18 DATA SPACE ORIENTED SCHE
Page 254 and 255:
Data Space Oriented Scheduling 233
Page 256 and 257:
Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Page 264 and 265:
Page 266 and 267:
Chapter 19 COMPILER-DIRECTED ILP EX
Page 268 and 269:
Compiler-Directed ILP Extraction 24
Page 270 and 271:
Page 272 and 273:
Page 274 and 275:
Page 276 and 277:
Page 278 and 279:
Page 280 and 281:
Page 282 and 283:
Chapter 20 STATE SPACE COMPRESSION
Page 284 and 285:
State Space Compression in History
Page 286 and 287:
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Chapter 21 SIMULATION TRACE VERIFIC
Page 298 and 299:
Simulation Trace Verification for Q
Page 300 and 301:
Page 302 and 303:
Page 304 and 305:
Page 306 and 307:
Page 308 and 309:
PART VI: ENERGY AWARE SOFTWARE TECH
Page 310 and 311:
Chapter 22 EFFICIENT POWER/PERFORMA
Page 312 and 313:
Efficient Power/Performance Analysi
Page 314 and 315:
Page 316 and 317:
Page 318 and 319:
Page 320 and 321:
Page 322 and 323:
Page 324 and 325:
Page 326 and 327:
Chapter 23 DYNAMIC PARALLELIZATION
Page 328 and 329:
Dynamic Parallelization of Array 30
Page 330 and 331:
Page 332 and 333:
Page 334 and 335:
Page 336 and 337:
Page 338 and 339:
Page 340 and 341:
Chapter 24 SDRAM-ENERGY-AWARE MEMOR
Page 342 and 343:
SDRAM-Energy-Aware Memory Allocatio
Page 344 and 345:
Page 346 and 347:
Page 348 and 349:
Page 350 and 351:
Page 352 and 353:
PART VII: SAFE AUTOMOTIVE SOFTWARE
Page 354 and 355:
Chapter 25 SAFE AUTOMOTIVE SOFTWARE
Page 356 and 357:
Safe Automotive Software Developmen
Page 358 and 359:
Page 360 and 361:
Page 362 and 363:
Page 364 and 365:
PART VIII: EMBEDDED SYSTEM ARCHITEC
Page 366 and 367:
Chapter 26 EXPLORING HIGH BANDWIDTH
Page 368 and 369:
Exploring High Bandwidth Pipelined
Page 370 and 371:
Page 372 and 373:
Page 374 and 375:
Page 376 and 377:
Page 378 and 379:
Page 380 and 381:
Chapter 27 ENHANCING SPEEDUP IN NET
Page 382 and 383:
Enhancing Speedup in Network Proces
Page 384 and 385:
Page 386 and 387:
Page 388 and 389:
Page 390 and 391:
Page 392 and 393:
Page 394 and 395:
Chapter 28 ON-CHIP STOCHASTIC COMMU
Page 396 and 397:
On-Chip Stochastic Communication 37
Page 398 and 399:
Page 400 and 401:
Page 402 and 403:
Page 404 and 405:
Page 406 and 407:
Page 408 and 409:
Chapter 29 HARDWARE/SOFTWARE TECHNI
Page 410 and 411:
HW/SW are Techniques for Improving
Page 412 and 413:
Page 414 and 415:
Page 416 and 417:
Page 418 and 419:
Page 420 and 421:
Page 422 and 423:
Page 424 and 425:
Chapter 30 RAPID CONFIGURATION & IN
Page 426 and 427:
Rapid Configuration & Instruction S
Page 428 and 429:
Page 430 and 431:
Page 432 and 433:
Page 434 and 435:
Page 436 and 437:
Page 438 and 439:
Page 440 and 441:
PART IX: TRANSFORMATIONS FOR REAL-T
Page 442 and 443:
Chapter 31 GENERALIZED DATA TRANSFO
Page 444 and 445:
Generalized Data Transformations 42
Page 446 and 447:
Page 448 and 449:
Page 450 and 451:
Page 452 and 453:
Page 454 and 455:
Page 456 and 457:
Chapter 32 SOFTWARE STREAMING VIA B
Page 458 and 459:
Software Streaming Via Block Stream
Page 460 and 461:
Page 462 and 463:
Page 464 and 465:
Page 466 and 467:
Page 468 and 469:
Page 470 and 471:
Chapter 33 ADAPTIVE CHECKPOINTING W
Page 472 and 473:
Adaptive Checkpointing with Dynamic
Page 474 and 475:
Page 476 and 477:
Page 478 and 479:
Page 480 and 481:
Page 482 and 483:
Page 484 and 485:
Page 486 and 487:
PART X: LO POWER SOFTWARE
Page 488 and 489:
Chapter 34 SOFTWARE ARCHITECTURAL T
Page 490 and 491:
Software Architectural Transformati
Page 492 and 493:
Page 494 and 495:
Page 496 and 497:
Page 498 and 499: Software Architectural Transformati
Page 506 and 507: Chapter 35 DYNAMIC FUNCTIONAL UNIT
Page 508 and 509: Dynamic Functional Unit Assignment
Page 520 and 521: Chapter 36 ENERGY-AWARE PARAMETER P
Page 522 and 523: Energy-Aware Parameter Passing 501
Page 534 and 535: Chapter 37 LOW ENERGY ASSOCIATIVE D
Page 536 and 537: Low Energy Associative Data Caches
Page 550 and 551: Index 529 packet flows parameter pa
show all

Embedded Software for SoC - Grupo de MecatrÃ´nica EESC/USP

Create successful ePaper yourself

Delete template?

Save as template?