Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

Embedded SW in Digital AM-FM Chipset 209
thrue the communication network structure but no arbiter has been integrated
within the chip. The software has to manage this constraint and to properly
allocate each resource. This flexible approach allows to change the software
partitioning when required.
Figure 16-3 presents an overview of the platform architecture of the DIAM
base band. The interconnection network is based on an AHB matrix and an
APB bus for the low data rate peripherals. Two external memories (one
associated with each core) are introduced to suppress potential bottlenecks
between the two cores.
The first version of the platform is processed in an ATMEL CMOS
technology.
3. SW ARCHITECTURE
Basically, the software has been split according to the data flow and the
available CPU. The physical layer has been mapped to one core and the
application layers are mapped onto the second core. Cache and TCM sizes
have been tuned to the specific requirements of the most demanding function.
TCM are assigned to the audio coder which presents the strongest constraint
regarding the real-time.
Figure 16-4 presents an overview of the software architecture.
The platform boot is not shown although its definition is quite tricky. This
dedicated SW is in charge of the initial configuration of each core and is
closely linked to the platform itself. By structure, each core starts executing
its SW at the same address (generally @0). Without any precaution both cores
will execute the same code. The retained solution for the DIAM platform is
based upon a hierarchical approach and a remap technique which allows to
translate the base of the slave core. This translation is performed during the
boot of the master core which then allows the boot of the slave core.