Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

SDRAM-Energy-Aware Memory Allocation 321
where:
time, in CS/STBY/PWDNmode
power in CS/STBY/PWDNmode
energy of a preacharge/activation
energy of a read/write
number of precharge and activations in Bank i
number of reads and writes in Bank i
The static energy consumption depends on which energy states are used
during execution. An energy state manager [8] controls when the banks should
transition to another energy state. As soon as the bank idles for more than
one cycle, the manager switches the bank to the CS-mode. When the bank is
needed again it is switched back to STDBY-mode within a cycle. Finally, we
switch off the bank as soon as it remains idle for longer than a million cycles. 1
The dynamic energy consumption depends on which operations are needed
to fetch/store the data from/into the memory. The energy parameters are
presented in Table 24-1. The remaining parameters are obtained by simulation
(see Section 6).
Table 24-1. Energy consumption parameters.
with self refresh
14 nJ/miss
2 nJ/access
50 mw
10.8 mW
0 mW
3. MOTIVATION AND PROBLEM FORMULATION
According to our experiments on a multi-processor architecture, the dynamic
energy contributes up to 68% of the energy of an SDRAM. Compared to a
single-processor architectures, the SDRAM banks are more frequently used,
and thus less static energy is burned waiting between consecutive accesses.
Moreover, even though in future technology leakage energy is likely to
increase, many techniques are under development by DRAM manufactures
to reduce the leakage energy during inactive modes [5]. Therefore, in this
paper we focus on data assignment techniques to reduce the dynamic energy.
At the same time, our techniques reduce the time of the SDRAM banks spent
in the active state, thereby thus reducing the leakage loss in that state which