Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

8 Chapter 1
platform requirements in order to obtain code that can be directly executed
on target system. To reach this goal the appropriate communication protocol
between modeled blocks has had to be selected from available communication
patterns. Unavailable communication patterns have been implemented
to fit the requirements of the existing hardware platform.
3.2. Software performance estimation
At the end of mapping phase‚ performance estimations have been carried out
to verify whether the obtained system model meets our system requirements.
In particular most strict constraints are in term of software execution time.
These simulations have been performed setting clock frequency to 16 MHz
and using the high-level MicroC/OS-II parameter values obtained via
RTL-ISS simulation (Table 1-1) that describe RTOS context switching and
interrupt latency overheads. In this scenario the ARM7TDMI CPU architectural
element has been modeled with a processor basis file tuned on automotive
applications code [6].
Performance results show that all front-end blocks‚ which are system blocks
with the hard-real time constraints‚ require 6.71 ms to complete their execu-