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Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

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472 Chapter 34<br />

During the iterative process, <strong>for</strong> each architectural trans<strong>for</strong>mation consi<strong>de</strong>red,<br />

we need to estimate the resulting change in energy consumption. Since<br />

this estimation is iterated a large number of times, it needs to be much more<br />

efficient than hardware or instruction-level simulation. We utilize high-level<br />

energy macro-mo<strong>de</strong>ls to provi<strong>de</strong> energy change estimates. as <strong>de</strong>scribed in<br />

Section 3.4.<br />

After an energy-efficient software architecture is obtained (as an SAG), the<br />

program source co<strong>de</strong> is generated to reflect the optimized software architecture.<br />

The optimized program co<strong>de</strong> can be executed in the low-level energy<br />

simulation framework to obtain accurate energy estimates <strong>for</strong> the optimized<br />

software architecture.<br />

The remain<strong>de</strong>r of this section <strong>de</strong>tails the important steps in the proposed<br />

methodology.<br />

3.2. <strong>Software</strong> architecture graph<br />

We represent the architecture of an embed<strong>de</strong>d software program as an SAG.<br />

An example of an SAG, <strong>for</strong> a program employed in a situational awareness<br />

system, is <strong>de</strong>picted in Figure 34-3.<br />

In the SAG, vertices represent hardware or software entities. Vertices can<br />

be of several types:<br />

Hardware <strong>de</strong>vices are represented by an empty box, with an optional<br />

crossbar <strong>for</strong> active <strong>de</strong>vices (e.g., the UART peripheral in Figure 34-3).

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