Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

Rapid Configuration & Instruction Selection for an ASIP 415
Table 30-3, and Table 30-4. At the end, we compare results from simulation
to our methodology.
The simulation results of 576 configurations are plotted in Figure 30-6 with
execution time verse area. The dark squares are the points obtained using our
methodology for differing area constraints. Those points selected by our
methodology corresponded to the Pareto points of the design space graph.
As mentioned above, the 576 configurations represent the entire design space
and these Pareto points indicate the fastest execution time under a particular
area constraint. Therefore, there are no extra Pareto points in this design space.
Moreover, Table 30-5 shows the information of all Pareto points such as area
in gates, simulated execution time in seconds, estimated execution time in
seconds, latency, selected Xtensa processor and the replaced software function
calls. Table 30-5 also indicates the estimation of application performance for
each configuration is on average within 4% of the simulation result. For the
fastest configuration (configuration 9 in Table 30-5), the application execution
time is reduced to 85% of the original execution time (configuration 1
in Table 30-5). The fastest configuration is with Xtensa processor P3 (that is
with a floating-point unit and its associated configurable core options). Seven
TIE instructions (LDEXP, FREXP, MOD3, FREXPLN, MANT, LP24, COMB)
are also implemented in the fastest configuration to replace four software
functions. There are square root, modular 3, natural logarithm and floatingpoint
division. The time for selection of core options and instructions are in
the order of a few hours (about 3–4 hrs), while the exhaustive simulation
method would take several weeks (about 300 hrs) to complete.
Table 30-5. Pareto points.
Configuration
Area
(gate)
Simulated
execution
time (sec.)
Estimated
execution
time (sec.)
% diff.
Latency
of the
proc.
Xtensa
Proc.
selected
Software function
replaced
1
2
3
4
5
6
7
8
9
35,000
67,000
72,500
87,000
88,100
93,600
100,400
103,700
105,900
1.8018
1.0164
1.0147
0.2975
0.2738
0.2670
0.2632
0.2614
0.2586
_
1.1233
1.1188
–
0.2718
0.2694
0.2651
0.2642
0.2638
_
10.5
10.2
–
0.7
2.1
1.9
1.0
2.0
5.32
7.1
7.1
6.45
6.5
6.5
6.8
6.9
7.0
P1
P1
P1
P3
P3
P3
P3
P3
P3
_
FP mult
Mod 3, FP mult
–
Sqrt (2)
Sqrt (1), Log
Sqrt (1), Log,
FP div (2)
Sqrt (2), Mod 3,
Log, FP div (2)
Sqrt (1), Mod 3,
Log, FP div (2)
Avg
–
–
–
4%
–
–
–