Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

228 Chapter 17
classes of loop nests. Especially, support for loops with variable bounds will
be developed.
REFERENCES
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
D. F. Bacon, S. L. Graham and O. J. Sharp. “Compiler Transformations for High-
Performance Computing.” ACM Computing Surveys, Vol. 26, p. 4, December 1994.
T. Bäck. Evolutionary Algorithms in Theory and Practice. Oxford University Press, Oxford,
1996.
M. Bister, Y. Taeymans and J. Cornelis. “Automatic Segmentation of Cardiac MR Images.”
IEEE Journal on Computers in Cardiology, 1989.
R. Drechsler. Evolutionary Algorithms for VLSI CAD. Kluwer Academic Publishers, Boston,
1998.
H. Falk. Control Flow Optimization by Loop Nest Splitting at the Source Code Level.
Research Report 773, University of Dortmund, Germany, 2002.
H. Falk and P. Marwedel. “Control Flow driven Splitting of Loop Nests at the Source
Code Level.” In Design, Automation and Test in Europe (DATE), Munich, 2003.
H. Falk, C. Ghez, M. Miranda and Rainer Leupers. “High-level Control Flow
Transformations for Performance Improvement of Address-Dominated Multimedia
Applications.” In Synthesis and System Integration of Mixed Technologies (SAS1MI),
Hiroshima, 2003.
S. Gupta, M. Miranda et al. “Analysis of High-level Address Code Transformations for
Programmable Processors.” In Design, Automation and Test in Europe (DATE), Paris, 2000.
Y. H. Hu (ed.). Data Transfer and Storage (DTS) Aarchitecture Issues and Exploration in
Multimedia Processors, Vol. Programmable Digital Signal Processors – Architecture,
Programming and Applications. Marcel Dekker Inc., New York, 2001.
M. Kandemir, N. Vijaykrishnan et al. “Influence of Compiler Optimizations on System
Power.” In Design Automation Conference (DAC), Los Angeles, 2000.
H. S. Kim, M. J. Irwin et al. “Effect of Compiler Optimizations on Memory Energy.” In
Signal Processing Systems (SIPS). Lafayette, 2000.
R. Leupers. Code Optimization Techniques for Embedded Processors – Methods, Algorithms
and Tools. Kluwer Academic Publishers, Boston, 2000.
R. Leupers and F. David. “A Uniform Optimization Technique for Offset Assignment
Problems.” In International Symposium on System Synthesis (ISSS), Hsinchu, 1998.
D. Levine. Users Guide to the PGAPack Parallel Genetic Algorithm Library. Technical
Report ANL-95/18, Argonne National Laboratory, 1996.
N. Liveris, N. D. Zervas et al. “A Code Transformation-Based Methodology for Improving
I-Cache Performance of DSP Applications.” In Design, Automation and Test in Europe
(DATE), Paris, 2002.
M. Lorenz, R. Leupers et al. “Low-Energy DSP Code Generation Using a Genetic
Algorithm.” In International Conference on Computer Design (ICCD), Austin, 2001.
T. S. Motzkin, H. Raiffa et al. “The Double Description Method.” Theodore S. Motzkin:
Selected Papers, 1953.
S. S. Muchnick. “Optimizing Compilers for SPARC.” SunTechnology, Vol. 1, p. 3. 1988.
S. S. Muchnick. Advanced Compiler Design and Implementation. Morgan Kaufmann, San
Francisco, 1997.
M. R. Stan and W. P. Burleson. “Bus-Invert Coding for Low-Power I/O.” IEEE Transactions
on VLSI Systems, Vol. 3, p. 1, 1995.
S. Steinke, M. Knauer, L. Wehmeyer and P. Marwedel. “An Accurate and Fine Grain
Instruction-Level Energy Model Supporting Software Optimizations.” In Power and Timing
Modeling, Optimization and Simulation (PATMOS), Yverdon-Les-Bains, 2001.