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Efficient Power/Performance Analysis 301 convergence schemes have been considered for three different precision thresholds: 0.001‚ 0.0005‚ and 0.0001 (E0.001‚ E0.0005‚ and E0.0001 for exponential and similar for the linear case). As it can be seen‚ the flat sampling case offers the highest speed-up‚ but at the expense of a very large error in some cases (e.g.‚ 20% for IPC estimation in case of go or 11% error for EPC in case of epic when run on a 4-way‚ superscalar processor). While the exponential and linear convergence cases outperform the adaptive sampling scheme in some cases in terms of accuracy‚ they have unpredictable behavior‚ depending on the benchmark. The adaptive sampling scheme is the only one that offers consistent low error (less than 2% for both energy and performance estimates)‚ irrespective of the type of processor being considered. The same cannot be said about the linear or exponential sampling schemes‚ showing their lack of adaptability to the application being run. For the worst case achieved in the case of flat sampling scheme (i.e.‚ benchmark go in case of single issue‚ in-order processors and epic in case of 4-way superscalar processors)‚ we also show in Table 22-1 the estimation error for the energy cost per module. As it can be seen‚ adaptive sampling case (denoted by adp in Table 22-1) consistently produces results that are less than 2% away from the exact‚ cycle-accurate values‚ while the flat sampling (denoted by flat in Table 22-1) scheme can generate up to 18.25% error in some cases. Finally‚ we have analyzed how the sampling schemes proposed in this chapter track the actual run-time profile of the application being run. We show in Figure 22-6 the estimated EPC values for the adaptive and flat sampling cases‚ compared to the original results provided by Wattch. As it can be seen‚ the adaptive case preserves the actual run-time profile much better (within 2% of the original)‚ while the flat sampling results can be off by as much as 12%. Table 22-1. Per component power errors. Component go flat go adp epic flat epic adp Rename Bpred Window LSQ Regfile Icache Dcache Dcache2 ALU Resultbus Clock N/A 18.25% N/A N/A 6.93% 2.75% 3.21% 2.36% 0.05% 9.80% 18.25% N/A 0.00% N/A N/A 0.00% 0.00% 0.00% 0.00% 0.00% 0.00% 1.52% 12.40% 6.05% 12.34% 7.91% 8.56% 9.39% 11.58% 2.44% 7.63% 12.00% 14.25% 0.64% 0.31% 0.81% 0.44% 0.58% 0.53% 0.49% 0.07% 0.50% 0.83% 0.41%
302 Chapter 22 6. CONCLUSION In this chapter we have presented a hybrid simulation strategy‚ which can accelerate the microarchitectural simulation without trading off accuracy. The strategy is based on the detection of hotspots and determining the exact sampling window size‚ which can be used for estimation of various metrics. We have also presented how these features can be exploited for simulation acceleration along with using a monitor table for reusing know information. By using these techniques we have been able to obtain substantial speedup‚ with negligible errors in IPC and EPC values. The proposed adaptive sampling scheme not only offers superior accuracy when compared to a simpler‚ flat sampling scheme‚ but also provides per module estimation error of less than 2% and faithfully tracks the run-time profile of the application under consideration. ACKNOWLEDGEMENT This research has been supported in part by NSF Career Award CCR-008479. NOTE 1 Classic notations from formal language theory have been used.
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EMBEDDED SOFTWARE FOR SoC
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Embedded Software for SoC Edited by
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DEDICATION This book is dedicated t
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TABLE OF CONTENTS Dedication Conten
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Table of Conents Chapter 16 EMBEDDE
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Table of Conents Chapter 33 ADAPTIV
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PREFACE The evolution of electronic
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INTRODUCTION Embedded software is b
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Introduction xvii software consists
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Introduction xix Energy-aware techn
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PART I: EMBEDDED OPERATING SYSTEMS
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Chapter 1 APPLICATION MAPPING TO A
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Application Mapping to a Hardware P
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Chapter 2 FORMAL METHODS FOR INTEGR
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Formal Methods for Integration of A
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Chapter 3 LIGHTWEIGHT IMPLEMENTATIO
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Lightweight Implementation of the P
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Chapter 4 DETECTING SOFT ERRORS BY
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Detecting Soft Errors by a Purely S
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PART II: OPERATING SYSTEM ABSTRACTI
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Chapter 5 RTOS MODELING FOR SYSTEM
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RTOS Modeling for System Level Desi
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Chapter 6 MODELING AND INTEGRATION
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Modeling and Integration of Periphe
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Chapter 7 SYSTEMATIC EMBEDDED SOFTW
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Systematic Embedded Software Genera
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PART III: EMBEDDED SOFTWARE DESIGN
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Chapter 8 EXPLORING SW PERFORMANCE
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Exploring SW Performance 99 of late
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Exploring SW Performance 101 operat
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Exploring SW Performance 103 The ch
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Exploring SW Performance 105 2.2. T
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Exploring SW Performance 107 Figure
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Exploring SW Performance 109 modem
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Chapter 9 A FLEXIBLE OBJECT-ORIENTE
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A Flexible Object-Oriented Software
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Chapter 10 SCHEDULING AND TIMING AN
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Analysis of HW/SW On-Chip Communica
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Chapter 11 EVALUATION OF APPLYING S
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Evaluation of Applying SpecC to the
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Chapter 12 INTERACTIVE RAY TRACING
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Interactive Ray Tracing on Reconfig
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Chapter 13 PORTING A NETWORK CRYPTO
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Porting a Network Cryptographic Ser
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PART IV: EMBEDDED OPERATING SYSTEMS
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Chapter 14 INTRODUCTION TO HARDWARE
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Introduction to Hardware Abstractio
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Chapter 15 HARDWARE/SOFTWARE PARTIT
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Hardware and Software Partitioning
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Chapter 16 EMBEDDED SW IN DIGITAL A
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Embedded SW in Digital AM-FM Chipse
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Embedded SW in Digital AM-FM Chipse
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PART V: SOFTWARE OPTIMISATION FOR E
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Chapter 17 CONTROL FLOW DRIVEN SPLI
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Control Flow Driven Splitting of Lo
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Chapter 18 DATA SPACE ORIENTED SCHE
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Data Space Oriented Scheduling 233
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Chapter 19 COMPILER-DIRECTED ILP EX
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Compiler-Directed ILP Extraction 24
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Chapter 27 ENHANCING SPEEDUP IN NET
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Enhancing Speedup in Network Proces
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Chapter 28 ON-CHIP STOCHASTIC COMMU
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On-Chip Stochastic Communication 37
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Chapter 29 HARDWARE/SOFTWARE TECHNI
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HW/SW are Techniques for Improving
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Chapter 30 RAPID CONFIGURATION & IN
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Rapid Configuration & Instruction S
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PART IX: TRANSFORMATIONS FOR REAL-T
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Chapter 31 GENERALIZED DATA TRANSFO
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Chapter 32 SOFTWARE STREAMING VIA B
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Software Streaming Via Block Stream
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Chapter 33 ADAPTIVE CHECKPOINTING W
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PART X: LO POWER SOFTWARE
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Chapter 34 SOFTWARE ARCHITECTURAL T
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Software Architectural Transformati
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Chapter 35 DYNAMIC FUNCTIONAL UNIT
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Dynamic Functional Unit Assignment
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Chapter 36 ENERGY-AWARE PARAMETER P
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Chapter 37 LOW ENERGY ASSOCIATIVE D
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Low Energy Associative Data Caches
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INDEX abstract communication access
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Index 529 packet flows parameter pa
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