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Interactive Ray Tracing on Reconfigurable SIMD Morphosys 157 object merging. We will discuss these optimizations in more details in the next section. 5. DATA STRUCTURE AND OPTIMIZATIONS We have developed a special data structure to support BSP mapping. This structure reduces data and contexts reload, as we describe in this section. Our data structure is created so that for each node the objects under it are known immediately. The data structure is illustrated in Figure 12-5. In this figure, the item bit-length (e.g., 16 bits) is specified in parenthesis after each item. Child Address stands for the address of each child node in FB. The objects descending from this node are grouped by object type. Sphere, cylinder, rectangle and other objects stand for vectors where each bit indicates whether or not the object of this type specified by its positions belongs to this node. Figure 12-5 gives one example for sphere case. We order all spheres as sphere 0, sphere 1, sphere 2, and so on. If any of these spheres belongs to the node, the bit indexed by its order is set to ‘1’ in the sphere vector. In this example, sphere 1, 3, 4 belong to the current node. TinyRISC tests these vectors to know which geometrical data to operate on when incoherence happens. All the identified objects under this node are tested. In all the cases, the objects are tested only once. This is called “object merging”, or mailbox in [6]. If one object is tested, it is labeled as tested. The calculated value is retained in the FB. If one object to be tested has been labeled, this testing is cancelled, and the value is fetched from FB. This data structure automatically does “object test reordering”, which tests the same objects without context reload. For example, we check all the spheres before we continue with other object types. Moreover this data structure allows
158 Chapter 12 the object addresses in the FB to be easily calculated, as is shown in the algorithm in Figure 12-6. It also facilities pre-fetching since objects are known in advance.
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EMBEDDED SOFTWARE FOR SoC
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Embedded Software for SoC Edited by
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DEDICATION This book is dedicated t
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TABLE OF CONTENTS Dedication Conten
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Table of Conents Chapter 16 EMBEDDE
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Table of Conents Chapter 33 ADAPTIV
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PREFACE The evolution of electronic
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INTRODUCTION Embedded software is b
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Introduction xvii software consists
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Introduction xix Energy-aware techn
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PART I: EMBEDDED OPERATING SYSTEMS
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Chapter 1 APPLICATION MAPPING TO A
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Application Mapping to a Hardware P
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Chapter 2 FORMAL METHODS FOR INTEGR
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Formal Methods for Integration of A
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Chapter 3 LIGHTWEIGHT IMPLEMENTATIO
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Lightweight Implementation of the P
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Chapter 4 DETECTING SOFT ERRORS BY
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Detecting Soft Errors by a Purely S
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PART II: OPERATING SYSTEM ABSTRACTI
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Chapter 5 RTOS MODELING FOR SYSTEM
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RTOS Modeling for System Level Desi
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Chapter 6 MODELING AND INTEGRATION
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Modeling and Integration of Periphe
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Chapter 7 SYSTEMATIC EMBEDDED SOFTW
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Systematic Embedded Software Genera
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PART III: EMBEDDED SOFTWARE DESIGN
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Chapter 8 EXPLORING SW PERFORMANCE
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Exploring SW Performance 99 of late
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Exploring SW Performance 101 operat
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Exploring SW Performance 103 The ch
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Exploring SW Performance 105 2.2. T
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Page 200 and 201: Chapter 14 INTRODUCTION TO HARDWARE
Page 202 and 203: Introduction to Hardware Abstractio
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Page 210 and 211: Hardware and Software Partitioning
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Chapter 16 EMBEDDED SW IN DIGITAL A
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Embedded SW in Digital AM-FM Chipse
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Embedded SW in Digital AM-FM Chipse
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PART V: SOFTWARE OPTIMISATION FOR E
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Chapter 17 CONTROL FLOW DRIVEN SPLI
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Control Flow Driven Splitting of Lo
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Chapter 18 DATA SPACE ORIENTED SCHE
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Data Space Oriented Scheduling 233
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Chapter 19 COMPILER-DIRECTED ILP EX
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Compiler-Directed ILP Extraction 24
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Chapter 20 STATE SPACE COMPRESSION
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State Space Compression in History
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Chapter 21 SIMULATION TRACE VERIFIC
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Simulation Trace Verification for Q
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PART VI: ENERGY AWARE SOFTWARE TECH
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Chapter 22 EFFICIENT POWER/PERFORMA
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Efficient Power/Performance Analysi
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Chapter 23 DYNAMIC PARALLELIZATION
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Dynamic Parallelization of Array 30
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Chapter 24 SDRAM-ENERGY-AWARE MEMOR
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SDRAM-Energy-Aware Memory Allocatio
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PART VII: SAFE AUTOMOTIVE SOFTWARE
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Chapter 25 SAFE AUTOMOTIVE SOFTWARE
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Safe Automotive Software Developmen
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PART VIII: EMBEDDED SYSTEM ARCHITEC
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Chapter 26 EXPLORING HIGH BANDWIDTH
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Exploring High Bandwidth Pipelined
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Chapter 27 ENHANCING SPEEDUP IN NET
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Enhancing Speedup in Network Proces
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Chapter 28 ON-CHIP STOCHASTIC COMMU
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On-Chip Stochastic Communication 37
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Chapter 29 HARDWARE/SOFTWARE TECHNI
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HW/SW are Techniques for Improving
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Chapter 30 RAPID CONFIGURATION & IN
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Rapid Configuration & Instruction S
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PART IX: TRANSFORMATIONS FOR REAL-T
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Chapter 31 GENERALIZED DATA TRANSFO
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Generalized Data Transformations 42
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Chapter 32 SOFTWARE STREAMING VIA B
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Software Streaming Via Block Stream
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Chapter 33 ADAPTIVE CHECKPOINTING W
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Adaptive Checkpointing with Dynamic
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PART X: LO POWER SOFTWARE
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Chapter 34 SOFTWARE ARCHITECTURAL T
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Software Architectural Transformati
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Chapter 35 DYNAMIC FUNCTIONAL UNIT
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Dynamic Functional Unit Assignment
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Chapter 36 ENERGY-AWARE PARAMETER P
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Energy-Aware Parameter Passing 501
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Chapter 37 LOW ENERGY ASSOCIATIVE D
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Low Energy Associative Data Caches
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INDEX abstract communication access
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Index 529 packet flows parameter pa
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