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Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

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Chapter 4<br />

DETECTING SOFT ERRORS BY A PURELY<br />

SOFTWARE APPROACH: METHOD‚ TOOLS<br />

AND EXPERIMENTAL RESULTS<br />

B. Nicolescu and R. Velazco<br />

TIMA Laboratory‚ “Circuit Qualification” Research Group‚ 46‚ Av. Félix Viallet‚ 38031‚<br />

Grenoble‚ France<br />

Abstract. A software technique allowing soft errors <strong>de</strong>tection occurring in processor-based<br />

digital architectures is <strong>de</strong>scribed. The <strong>de</strong>tection mechanism is based on a set of rules allowing<br />

the trans<strong>for</strong>mation of the target application into a new one‚ having the same functionality but<br />

being able to i<strong>de</strong>ntify bit-flips arising in memory areas as well as those perturbing the processor’s<br />

internal registers. Experimental results‚ issued from both fault injection sessions and preliminary<br />

radiation test campaigns per<strong>for</strong>med in a complex digital signal processor; provi<strong>de</strong><br />

objective figures about the efficiency of the proposed error <strong>de</strong>tection technique.<br />

Key words: bit flips‚ SEU‚ SET‚ <strong>de</strong>tection efficiency‚ error rate<br />

1. INTRODUCTION<br />

Technological progress achieved in the microelectronics technology has as a<br />

consequence the increasing sensitivity to effects of the environment (i.e.<br />

radiation‚ EMC). Particularly‚ processors operating in space environment are<br />

subject to different radiation phenomena‚ whose effects can be permanent or<br />

transient [1]. This paper strictly focuses on the transient effects‚ also called<br />

SEUs (Single Event Upsets) occurring as the consequence of the impact of<br />

charged particles with sensitive areas of integrated circuits. The SEUs are<br />

responsible <strong>for</strong> the modification of memory cells content‚ with consequences<br />

ranging from erroneous results to system control problem. The consequences<br />

of the SEUs <strong>de</strong>pend on both the nature of the perturbed in<strong>for</strong>mation and the<br />

bit-flips occurrence instants.<br />

For complex processor architectures‚ the sensitivity to SEUs is strongly<br />

related to the amount of internal memory cells (registers‚ internal memory).<br />

Moreover‚ it is expected that future <strong>de</strong>ep submicron circuits operating at very<br />

high frequencies will be also subject to transient errors in combinational parts‚<br />

as a result of the impact of a charged particle. This phenomenon‚ so-called<br />

SET (Single Event Transient) could constitute a serious source of errors not<br />

only <strong>for</strong> circuits operating in space‚ but also <strong>for</strong> digital equipment operating<br />

in the Earth’s atmosphere at high altitu<strong>de</strong>s (avionics) and even at ground level<br />

[2]. In the new areas where computer-based <strong>de</strong>pendable systems are currently<br />

39<br />

A Jerraya et al. (eds.)‚ <strong>Embed<strong>de</strong>d</strong> <strong>Software</strong> <strong>for</strong> SOC‚ 39–50‚ 2003.<br />

© 2003 Kluwer Aca<strong>de</strong>mic Publishers. Printed in the Netherlands.

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