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Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

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440 Chapter 32<br />

block branch. All off-block branches to blocks not yet loa<strong>de</strong>d must be modified<br />

<strong>for</strong> streaming to work properly. (Clearly, the rea<strong>de</strong>r may infer that our<br />

approach involves a <strong>for</strong>m of binary rewriting.)<br />

For the first case, a branch instruction which can potentially cause the<br />

processor to execute co<strong>de</strong> in another block is modified to load the block<br />

containing the nee<strong>de</strong>d co<strong>de</strong> as illustrated in Example 32-1. For the second<br />

case, suppose the last instruction in the block is not a goto or a return instruction<br />

and that the following block has not yet been loa<strong>de</strong>d into memory. If left<br />

this way, the processor might execute the next instruction. To prevent the<br />

processor from executing invalid co<strong>de</strong>, an instruction is appen<strong>de</strong>d by <strong>de</strong>fault<br />

to load the next block; an example of this is shown at the end of Example<br />

32-1. For the third case, no return instruction ever needs to be modified if<br />

blocks are not allowed to be removed from memory since the instruction<br />

after the caller instruction is always valid (even if the caller instruction is the<br />

last instruction in the block upon initial block creation, an instruction will be<br />

appen<strong>de</strong>d according to the second case above). However, if blocks are allowed<br />

to be removed, all return instructions returning to another block must be<br />

modified to load the other block (i.e., the caller block) if nee<strong>de</strong>d. For the last<br />

case mentioned in the previous paragraph, all exception co<strong>de</strong> must be streamed<br />

be<strong>for</strong>e executing the block containing the corresponding exception instruction.<br />

There<strong>for</strong>e, exception instructions are not modified.<br />

EXAMPLE 32-1: Consi<strong>de</strong>r the if-else C statement in Figure 32-3. The C<br />

statement is compiled into corresponding PowerPC assembly instructions. The<br />

application can be divi<strong>de</strong>d so that the statement is split into different blocks.<br />

Figure 32-3 shows a possible split.<br />

In this small example, the first block (Block 1) contains two branch instructions,<br />

each of which could potentially jump to the second block. If the second<br />

block (Block 2) is not in memory, this application will not work properly.<br />

There<strong>for</strong>e, these branch instructions must be modified. All off-block branches<br />

are modified to invoke the appropriate loa<strong>de</strong>r function if the block is not in<br />

memory. After the missing block is loa<strong>de</strong>d, the inten<strong>de</strong>d location of the original<br />

branch is taken. Figure 32-4 shows Block 1 and Block 2 from Figure 32-3

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