Embedded Software for SoC - Grupo de Mecatrônica EESC/USP

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16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
System-on-a-Chip Memory Management.” Proceedings of International Symposium
Hardware/Software Co-design (CODES ’02), pp. 79–84, May 2002.
P. Shiu, Y. Tan, and V. Mooney. “A Novel Parallel Deadlock Detection Algorithm and
Architecture.” Proceedings of International Symposium Hardware/Software Codesign
(CODES ’01), pp. 30–36, April 2001.
D. Sun et al. “Atalanta: A New Multiprocessor RTOS Kernel for System-on-a-Chip
Applications,” Tech. Report GIT-CC-02-19, Georgia Institute of Technology, Atlanta, 2002,
http://www.cc.gatech.edu/pubs.html.
M. Shalan and V. Mooney. “Hardware Support for Real-Time Embedded Multiprocessor
System-on-a-Chip Memory Management.” Georgia Institute of Technology, Atlanta,
Georgia, Technical Report GIT-CC-03-02, 2003, http://www.cc.gatech.edu/tech_reports/.
Mentor Graphics, Hardware/Software Co-Verification: Seamless, http://www.mentor.com/
seamless.
L. Lindh and F. Stanischewski. “FASTCHART – Idea and Implementation.” Proceedings
of the International Conference on Computer Design (ICCD’91), pp. 401–404, 1991.
L. Lindh. “Idea of FASTHARD – A Fast Deterministic Hardware Based Real-Time Kernel.”
Proceedings of the European Workshop on Real-Time Systems, June 1992.
L. Lindh, J. Stärner, and J. Furunäs, “From Single to Multiprocessor Real-Time Kernels in
Hardware.” Real-Time Technology and Applications Symposium (RTAS’95), pp. 42–43, May
1995.
J. Adomat, J. Furunäs, L. Lindh, and J. Stärner. “Real-Time Kernels in Hardware RTU: A
Step Towards Deterministic and High Performance Real-Time Systems.” Proceedings of
the European Workshop on Real-Time Systems, pp. 164–168, June 1996.
RealFast, http://www.realfast.se
J. Lee, V. Mooney, A. Daleby, K. Ingström, T. Klevin, and L. Lindh. “A Comparison of
the RTU Hardware RTOS with a Hardware/Software RTOS.” Proceedings of the Asia and
South Pacific Design Automation Conference (ASPDAC’03), pp. 683–688, January 2003.
B. S. Akgul and V. Mooney. “PARLAK: Parametrized Lock Cache Generator.” Proceedings
of the Design Automation and Test in Europe Conference (DATE’03), pp. 1138–1139, March
2003.
M. Shalan, E. Shin, and V. Mooney. “DX-Gt: Memory Management and Crossbar Switch
Generator for Multiprocessor System-on-a-Chip.” Workshop on Synthesis and System
Integration of Mixed Information Technologies (SASIMI’03), April 2003.
M. Olson. “Selecting and Implementing an Embedded Database System.” IEEE Computer
Magazine, pp. 27–34, September 2000.