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Radio Frequency Integrated Circuit Design - Webs

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The Use and <strong>Design</strong> of Passive <strong>Circuit</strong> Elements in IC Technologies<br />

Figure 5.27 Basic model of transformer.<br />

vias to decrease the effective series resistance. This will increase the Q, but at<br />

the expense of increased capacitance to the substrate and a resultant decrease<br />

in self-resonant frequency. This technique is of benefit for small inductors for<br />

which the substrate loss is not dominant and that are at low enough frequency,<br />

safely away from the self-resonant frequency.<br />

The second method is to connect two or more layers in series. This results<br />

in increased inductance for the same area or allows the same inductance to be<br />

realized in a smaller area. A drawing of a two-level inductor is shown in Figure<br />

5.29. Note that the fluxes through the two windings will reinforce one another<br />

and the total inductance of the structure will be L top + L bottom + 2M in this<br />

case. If perfect coupling is assumed and the inductors are of equal size, then<br />

this gives 4L. In general, this is a factor of n 2 more inductance, where n is the<br />

number of levels. Thus, this is a way to get larger inductance without using as<br />

much chip area.<br />

To determine the capacitance associated with the inductor, we consider<br />

the top and bottom spirals as two plates of a capacitor with total distributed<br />

capacitance C 1 [17]. In addition, we consider the bottom spiral and the substrate<br />

to form a distributed capacitance C 2. Now the total equivalent capacitance of<br />

the structure can be approximated. First, note that if a voltage V1 is applied<br />

across the terminals of the inductor, the voltage across C 1 will go from V 1 at<br />

the terminals down to zero at the via. Similarly, the voltage across C 2 will go<br />

from zero at the terminal (assuming this point is grounded) to V 1/2 at the via.<br />

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