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Radio Frequency Integrated Circuit Design - Webs

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192 <strong>Radio</strong> <strong>Frequency</strong> <strong>Integrated</strong> <strong>Circuit</strong> <strong>Design</strong><br />

vns = √ 4kTR S = √ 4 � (4 � 10−21 ) � 75� = 1.1 nV/√ Hz<br />

Since the input is matched, this voltage is divided by half to the input of<br />

the driver transistor and then sees the full voltage gain of the amplifier. Thus,<br />

the noise at the output due to the source resistance is<br />

vo(source) = 1<br />

2 vnsG = 1<br />

� 1.1 nV/√Hz � 4 = 2.2 nV/√Hz 2<br />

The current produced by the degeneration resistor is<br />

in E = √ 4kT<br />

R E<br />

= √ 4 � (4 � 10 −21 )<br />

20�<br />

= 28.3 pA/√ Hz<br />

This current is split between the degeneration resistor and the emitter of<br />

the driver transistor. The fraction that enters the driver transistor develops into<br />

a voltage at the collector of the cascode transistor and is then passed to the<br />

output through the follower:<br />

von = i<br />

E nE �� R E<br />

re + R E� R L � A BO<br />

= 28.3 pA/√Hz �� 20�<br />

� 115� �0.9<br />

5� + 20��<br />

= 2.3 nV/√ Hz<br />

If we assume that the source resistance and the emitter degeneration resistor<br />

are the two dominant noise sources, then the noise figure is<br />

v 2 � ons<br />

= 10 log��2.3nV/√Hz�2 2<br />

+ �2.2nV/√Hz� �<br />

2<br />

�2.2nV/√Hz� NF = 10 log� v 2 on E + v 2 ons<br />

= 3.2 dB<br />

The performance of this design is now verified by simulation. The voltage<br />

gain is shown in Figure 6.38 and is between 12.3 and 12.4 dB over the frequency

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