Radio Frequency Integrated Circuit Design - Webs

20 Radio Frequency Integrated Circuit Design
6.36 nV/√Hz vR = = 4.5 nV/√ S Hz
√ 2
For the other resistors, the voltage is
Total output noise is given by
v R S = 0.5 � 0.9 = 0.45 nV/√ Hz
v R L = 0.5 � 0.9 = 0.45 nV/√ Hz
2
2
vno(total) = √v(R S +R L ) + vR + v
S 2
R =
L √6.362 + 0.45 2 + 0.45 2
= 6.392 nV/√ Hz
Therefore, the noise figure can now be determined:
Noise factor = F = No (total)
No (source)
=� 6.392
4.5 � 2
= (1.417) 2 = 2.018
NF = 10 log10 F = 10 log 10 2.018 = 3.05 dB
Since the output voltage also sees a voltage divider of 1/2, it has a value
of 5V. Thus, the signal-to-noise ratio is
S
N
= 20 log
�
6.392 nV
√ Hz
5
= 117.9 dB
� √1 MHz�
This example illustrates that noise from the source and amplifier input
resistance are the dominant noise sources in the circuit. Each resistor at the
input provides 4.5 nV/√Hz, while the two resistors behind the amplifier each
only contribute 0.45 nV/√Hz. Thus, as explained earlier, after a gain stage,
noise is less important.
Example 2.3 Effect of Impedance Mismatch on Noise Figure
Find the noise figure of Example 2.2 again, but now assume that R 2 = 500�.
Solution
As before, the output noise due to the resistors is as follows:
vno(R S ) = 0.9 � 500
� 20 � 0.5 = 8.181 nV/√Hz 550