Radio Frequency Integrated Circuit Design - Webs

56 Radio Frequency Integrated Circuit Design
Figure 3.12 Transistor with noise models: (a) base series noise source; and (b) base parallel
noise source.
Figure 3.13 Transistor small-signal model with noise.
3.10 Bipolar Transistor Design Considerations
For highest speed, a bias current near peak f T is suggested. However, it can be
noted from Figure 3.8 that the peaks are quite wide. The f T drops by 10% of
its peak value only when current is reduced to half of the optimum value or
when it is increased by 50% over its optimum value. Figure 3.8 also shows
that junction capacitance is roughly proportional to transistor size, while base
resistance is inversely proportional to transistor size.
Thus, a few guidelines are provided as follows:
• Pick lower current to reduce power dissipation with minimal reduction
of f T . For noise consideration, lower current is often used.