Radio Frequency Integrated Circuit Design - Webs

232 Radio Frequency Integrated Circuit Design
7.12.1 Sizing Transistors
The differential pair that usually forms the bottom of a double-balanced mixer
is basically an LNA stage, and the transistors and associated passives can be
optimized using the techniques of the previous chapter. The switching quad
transistors are the parts of the circuit unique to the mixer. Usually, these
transistors are sized so that they operate close to their peak f T at the bias current
that is optimal for the differential pair amplifier. In a bipolar design, if the
differential pair transistors are biased at their minimum noise current, then the
switching transistors end up being about one-eighth the size.
7.12.2 Increasing Gain
As shown previously in (7.20), without matching considerations and assuming
full switching of the upper quad, voltage gain is estimated by
vo = 2
�
R C
re + R E
v in
(7.42)
To increase the gain, the choices are to increase the load resistance R C ,
to reduce degeneration resistance R E , or to increase the bias current IB . Since
the output bias voltage is approximately equal to VC ≈ V CC − I B R C , increased
gain will be possible only if adjustments to R C , R E ,orIB do not cause the
switching transistors to become saturated.
7.12.3 Increasing IP3
How to increase IP3 depends on which part of the circuit is compressing.
Compression can be due to overdriving of the lower differential pair, clipping
at the output, or the LO bias voltage being too low, causing clipping at the
collectors of the bottom differential pair. After a problem has been identified,
IP3 can be improved by one or more of the following:
1. If the compression is due to the bottom differential pair (RF input),
then linearity can be improved by increasing R E or by increasing bias
current. We note from (7.42) that increased R E will result in decreased
gain. Increased bias current will increase the gain slightly through a
reduction of re , although this effect will be small if degeneration
resistance is significantly larger than re .
2. Compression caused by clipping at the output is typically due to the
quad transistors going into saturation. Saturation can be avoided by
reducing the bias current or reducing the load resistors. Either technique