Radio Frequency Integrated Circuit Design - Webs

242 Radio Frequency Integrated Circuit Design
Solution
With the current flowing in the quad stage of the mixer, it would be impossible,
due to headroom constraints, to raise the resistance, so we must now employ
the PMOS current steering technique shown in Figure 7.33. The PMOS will
now make up the capacitor that was placed in the tank to remove high-frequency
feed-through of RF and LO signals. The PMOS must be made large to ensure
that they are not noisy and that they have a low saturation voltage. A device
with a length of 2 �m and a width of 800 �m was chosen through simulation.
No current source was needed in this case, as the voltage levels seemed to be
fine without it.
The resistors were then doubled to 800� to restore the gain of the circuit.
Also, the buffers are all doubled in current because they will now have to handle
signals that are twice as large. The results of this new SSB mixer are shown in
Table 7.8.
Note that the NF has dropped due to the increased gain. The linearity
has been degraded slightly due to the additional nonlinearity of the output
resistance of the PMOS transistors.
One more improvement can be made to this circuit. The mixer can be
put into a Moore configuration to reduce the effect of R E on the noise figure.
When this was done, the noise due to R E reduced to about half its previous
value, but because it was responsible for only a small percentage of the total
noise, the new noise figure was lowered by only 0.5 to 13.0 dB. This is not a
dramatic improvement, but as it comes at no additional cost, it is worthwhile.
If the gain of this mixer were increased further, then the importance of R E on
the noise figure would increase and a greater improvement would be seen.
7.13 CMOS Mixers
Most of the circuits, techniques, and analyses used for bipolar mixers can also
be used for CMOS mixers. For example, one can realize single-balanced and
double-balanced CMOS mixers as shown in Figure 7.37.
Table 7.8
Results of the Image Reject Mixer with PMOS Current Steering Transistors
Parameter Value
Gain 13.6 dB
NF 13.5 dB
IIP3 5.7 dBm
Voltage 3.3V
Current 50 mA
Image rejection 69 dB