Radio Frequency Integrated Circuit Design - Webs

LNA Design
Figure 6.18 Minimum noise figure plotted versus bias current for a 20-� m transistor.
Figure 6.19 R opt plotted versus emitter length with current density set for low noise.
L b =
1
C�� 2 − R S C�
=
g m
= 1.16 nH
1
50� (742.5 fF)
2 −
(742.5 fF)(2 � � � 5 GHz) 184 mA/V
These two values were refined with the help of the simulator. In the simulator,
L e = 290 pH and L b = 1 nH were found to be the best choices.
Once these values were chosen, a final set of simulations was performed
on the circuit.
First, the S11 of the circuit was plotted to verify that the matching was
successful. A plot of S11 is shown in Figure 6.20. Note that the circuit is almost
perfectly matched at 5 GHz as designed. Of course, in practice, loss from
inductors as well as packaging and bond wires would never allow such perfect
results in the lab.
167