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Radio Frequency Integrated Circuit Design - Webs

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236 <strong>Radio</strong> <strong>Frequency</strong> <strong>Integrated</strong> <strong>Circuit</strong> <strong>Design</strong><br />

Since this formula is an approximation and we have one other nonlinearity<br />

to worry about, we will choose R E = 70� for this design.<br />

Next, we can find the load resistor, noting that we want 15 dB of voltage<br />

gain or 5.6 volts per volt (V/V). Using (7.20) (omitting output matching),<br />

R C = �<br />

2 A v� re + R E<br />

2 �<br />

�<br />

= 5.6(8.3� + 35�) = 380�<br />

2<br />

Note that there will be losses due to the ro of the quad transistors and<br />

some loss of current between the stages, but we will start with an R C value of<br />

400�. We also include capacitors C C in parallel with the resistors R C to filter<br />

out high-frequency signals coming out of the mixer. We will choose the filter<br />

to have a corner frequency of 100 MHz; therefore, the capacitors should be<br />

sized to be<br />

C C =<br />

1<br />

2�fc R C<br />

=<br />

1<br />

= 4pF<br />

2�(100 MHz)(400�)<br />

Now the coupling network needs to be designed. The current sources<br />

I bias will need about 0.7V across them to work properly, and the differential<br />

pair should have roughly 1.5V to avoid nonlinearity. This leaves the resistors R cc<br />

with about 0.8V; thus, a value between 200� and 400� would be appropriate for<br />

these resistors. We choose 300�.<br />

The quad transistors will each have an re of 16.7�. This is less than<br />

1/10th of the value of R cc, and if they are placed in series with a 3-pF capacitor,<br />

they still have an impedance with a magnitude of 31.5� or about 1/10th that<br />

of R cc. Thus, little current will be lost through the resistors R cc.<br />

The quad transistors themselves were sized so that when operated at 1.5<br />

mA each, they were at the current for peak f T . For minimum noise, the<br />

differential pair transistors were sized somewhat larger than the quad transistors.<br />

However, since the noise will be dominated by R E , exact sizing for minimum<br />

noise was not critical.<br />

The circuit also needs to be matched. Since inductors have not been<br />

allowed, we do this in a crude manner by placing a 100� resistor across the<br />

input.<br />

Next, we can estimate the noise figure of this design. The biggest noise<br />

contributors will be R E , R Match, and the source resistance. The noise spectral<br />

density produced by both the matching resistor and the source vn(source) will<br />

be<br />

vn(source) = √ 4kTR Match = 1.29 nV<br />

√ Hz

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