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LNA <strong>Design</strong><br />

[5] Ray, B., et al., ‘‘A Highly Linear Bipolar 1V Folded Cascode 1.9GHz Low Noise Amplifier,’’<br />

Proc. BCTM, Sept. 1999, pp. 157–160.<br />

[6] Long, J. R., and M. A. Copeland, ‘‘A 1.9GHz Low-Voltage Silicon Bipolar Receiver Front-<br />

End for Wireless Personal Communications Systems,’’ IEEE J. Solid-State <strong>Circuit</strong>s,<br />

Vol. 30, Dec. 1995, pp. 1438–1448.<br />

[7] Gray, P. R., et al., Analysis and <strong>Design</strong> of Analog <strong>Integrated</strong> <strong>Circuit</strong>s, 4th ed., New York:<br />

John Wiley & Sons, 2001.<br />

Selected Bibliography<br />

Abou-Allam, E., J. J. Nisbet, and M. C. Maliepaard, ‘‘A 1.9GHz Front-End Receiver in 0.5�m<br />

CMOS Technology,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 36, Oct. 2001, pp. 1434–1443.<br />

Baumberger, W., ‘‘A Single-Chip Rejecting Receiver for the 2.44 GHz Band Using Commercial<br />

GaAs-MESFET-Technology,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 29, Oct. 1994, pp. 1244–1249.<br />

Copeland, M. A., et al., ‘‘5-GHz SiGe HBT Monolithic <strong>Radio</strong> Transceiver with Tunable Filtering,’’<br />

IEEE Trans. on Microwave Theory and Techniques, Vol. 48, Feb. 2000, pp. 170–181.<br />

Harada, M., et al., ‘‘2-GHz RF Front-End <strong>Circuit</strong>s at an Extremely Low Voltage of 0.5V,’’ IEEE<br />

J. Solid-State <strong>Circuit</strong>s, Vol. 35, Dec. 2000, pp. 2000–2004.<br />

Krauss, H. L., C. W. Bostian, and F. H. Raab, Solid State <strong>Radio</strong> Engineering, New York: John<br />

Wiley & Sons, 1980.<br />

Long, J. R., ‘‘A Low-Voltage 5.1–5.8GHz Image-Reject Downconverter RFIC,’’ IEEE J. Solid-<br />

State <strong>Circuit</strong>s, Vol. 35, Sept. 2000, pp. 1320–1328.<br />

Macedo, J. A., and M. A. Copeland, ‘‘A 1.9 GHz Silicon Receiver with Monolithic Image<br />

Filtering,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 33, March 1998, pp. 378–386.<br />

Razavi, B., ‘‘A 5.2-GHz CMOS Receiver with 62-dB Image Rejection,’’ IEEE J. Solid-State<br />

<strong>Circuit</strong>s, Vol. 36, May 2001, pp. 810–815.<br />

Rogers, J. W. M., J. A. Macedo, and C. Plett, ‘‘A Completely <strong>Integrated</strong> Receiver Front-End<br />

with Monolithic Image Reject Filter and VCO,’’ Proc. IEEE RFIC Symposium, June 2000,<br />

pp. 143–146.<br />

Rudell, J. C., et al., ‘‘A 1.9-GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless<br />

Telephone Applications,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 32, Dec. 1997, pp. 2071–2088.<br />

Samavati, H., H. R. Rategh, and T. H. Lee ‘‘A 5-GHz CMOS Wireless LAN Receiver Front<br />

End,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 35, May 2000, pp. 765–772.<br />

Schmidt, A., and S. Catala, ‘‘A Universal Dual Band LNA Implementation in SiGe Technology<br />

for Wireless Applications,’’ IEEE J. Solid-State <strong>Circuit</strong>s, Vol. 36, July 2001, pp. 1127–1131.<br />

Schultes, G., P. Kreuzgruber, and A. L. Scholtz, ‘‘DECT Transceiver Architectures: Superheterodyne<br />

or Direct Conversion?’’ Proc. 43rd Vehicular Technology Conference, Secaucus, NJ,<br />

May 18–20, 1993, pp. 953–956.<br />

195

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