Digital Electronics: Principles, Devices and Applications

Logic Families 137multi-emitter input transistor of the Schottky TTL by diodes D 1 and D 2 and resistor R 1 . The junctiondiodes basically replace the two emitter-base junctions of the multi-emitter input transistor Q 1 of theSchottky TTL NAND (Fig. 5.19). The reason for doing so is that Schottky diodes can be made smallerthan the transistor and therefore will have lower parasitic capacitances. Also, since Q 1 of LS-TTL (Fig.5.20) cannot saturate, it is not necessary to remove its base charge with a bipolar junction transistor.5.3.6.1 Characteristic FeaturesCharacteristic features of this family are summarized as follows: V IH = 2V; V IL = 0.8 V; I IH = 20 A;I IL = 0.4 mA; V OH = 2.7 V; V OL = 0.5 V; I OH = 0.4 mA; I OL = 8 mA; V CC = 4.75–5.25 V (74-series) and4.5–5.5 V (54-series); propagation delay (for a load resistance of 280 , a load capacitance of15 pF, V CC = 5 V and an ambient temperature of 25 °C) = 15 ns (max.) for both LOW-to-HIGH andHIGH-to-LOW output transitions; worst-case noise margin = 0.3 V; fan-out = 20; I CCH (for all fourgates) = 1.6 mA; I CCL (for all four gates) = 4.4 mA; operating temperature range = 0–70 °C (74-series) and −55 to +125 °C (54-series); speed–power product = 18 pJ; maximum flip-flop togglefrequency = 45 MHz.5.3.7 Advanced Low-Power Schottky TTL (74ALS/54ALS)The basic ideas behind the development of the advanced low-power Schottky TTL (ALS-TTL) andadvanced Schottky TTL (AS-TTL) discussed in Section 5.3.8 were further to improve both speedand power consumption performance of the low-power Schottky TTL and Schottky TTL familiesrespectively. In the TTL subfamilies discussed so far, we have seen that different subfamilies achievedimproved speed at the expense of increased power consumption, or vice versa. For example, the lowpowerTTL offered lower power consumption over standard TTL at the cost of reduced speed. Thehigh-power TTL, on the other hand, offered improved speed over the standard TTL at the expense ofincreased power consumption. ALS-TTL and AS-TTL incorporate certain new circuit design featuresand fabrication technologies to achieve improvement of both parameters. Both ALS-TTL and AS-TTLoffer an improvement in speed–power product respectively over LS-TTL and S-TTL by a factor of 4.Salient features of ALS-TTL and AS-TTL include the following:1. All saturating transistors are clamped by using Schottky diodes. This virtually eliminates the storageof excessive base charge, thus significantly reducing the turn-off time of the transistors. Eliminationof transistor storage time also provides stable switching times over the entire operational temperaturerange.2. Inputs and outputs are clamped by Schottky diodes to limit the negative-going excursions.3. Both ALS-TTL and AS-TTL use ion implantation rather than a diffusion process, which allowsthe use of small geometries leading to smaller parasitic capacitances and hence reduced switchingtimes.4. Both ALS-TTL and AS-TTL use oxide isolation rather than junction isolation between transistors.This leads to reduced epitaxial layer–substrate capacitance, which further reduces the switchingtimes.5. Both ALS-TTL and AS-TTL offer improved input threshold voltage and reduced low-level inputcurrent.6. Both ALS-TTL and AS-TTL feature active turn-off of the LOW-level output transistor, producinga better HIGH-level output voltage and thus a higher HIGH-level noise immunity.