Digital Electronics: Principles, Devices and Applications

Multiplexers and Demultiplexers 289Table 8.11 Example 8.6.A B C S C o0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 10ABC12 2S23-to-832 1 Decoder42 0 567CoFigure 8.22 Example 8.6.Example 8.7A combinational circuit is defined by F = 0, 2, 5, 6, 7. Hardware implement the Boolean function Fwith a suitable decoder and an external OR/NOR gate having the minimum number of inputs.SolutionThe given Boolean function has five three-variable minterms. This implies that the function can beimplemented with a 3-to-8 line decoder and a five-input OR gate. Also, F will have only threethree-variable minterms, which means that F could also be implemented by considering mintermscorresponding to the complement function and using a three-input NOR gate at the output. The secondoption uses a NOR gate with fewer inputs and therefore is used instead. F = 0, 2, 5, 6, 7. Therefore,F = 1, 3, 4.Figure 8.23 shows the hardware implementation of Boolean function F.