Digital Electronics: Principles, Devices and Applications

Logic Families 157Figure 5.41Two-input EX-OR in CMOS.5.5.1.8 AND-OR-INVERT and OR-AND-INVERT GatesFigure 5.43 shows the internal schematic of a typical two-wide, two-input AND-OR-INVERT gate.The output of this gate can be logically expressed by the Boolean equationY = AB + CD (5.3)From the above expression, we can say that the output should be in a logic ‘0’ state for the followinginput conditions:1. When either AB = logic ‘1’ or CD = logic ‘1’2. When both AB and CD equal logic ‘1’.