Digital Electronics: Principles, Devices and Applications

314 Digital ElectronicsInputs(n)(k)AND-Gates(Product terms)(m)OR-Gates(Sum terms)Output(m)Figure 9.13Generalized representation of PLA architecture.each of the Boolean functions and their complements should be simplified. What is desirable is to havefewer product terms and product terms that are common to other functions. We would recall that PLAsoffer the flexibility of implementing Boolean functions in both AND-OR and AND-OR-INVERT forms.Example 9.2Show the logic arrangement of both a PROM and a PLA required to implement a binary full adder.SolutionThe truth table of a full adder is given in Table 9.1. The Boolean expressions for sum S and carry-outC o can be written as follows:S = 1 2 4 7 (9.3)C o = 3 5 6 7 (9.4)Figure 9.14 shows the implementation with an 8 × 2 PROM.If we simplify the Boolean expressions for the sum and carry outputs, we will find that the expressionfor the sum output cannot be simplified any further, and also that the expression for carry-out can besimplified to three product terms with fewer literals. If we examine even the existing expressions, wefind that we would need seven AND gates in the PLA implementation. And if we use the simplifiedexpressions, even then we would require the same number of AND gates. Therefore, the simplificationhere would not help as far as its implementation with a PLA is concerned. Figure 9.15 shows theimplementation of a full adder with a PLA device.Table 9.1 Truth table for example 9.2.A B Carry-in Sum Carry-out(C i ) (S) (C o )0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1