Digital Electronics: Principles, Devices and Applications

692 Digital Electronicsto indicate logic HIGH, logic LOW and Hi-Z states. Depending upon the actual logic status wherethe probe is touched, the corresponding LED comes on. The probe can be used to determine openand short circuits. Also, the probe has settings for different logic families to accommodate differentacceptable voltage level ranges for logic LOW and HIGH status for different logic families.16.17 Logic AnalyserThe logic analyser is used for performance analysis and fault diagnosis of digital systems.Logic analysers have become a very relevant and indispensable diagnostic tool in the presentdayinstrumentation scenario, with the whole gamut of electronic instruments being centred onmicroprocessor/microcomputer-based digital architecture. In addition, most logic analysers can beconfigured to format their outputs as a sequence of microprocessor instructions, which makes themuseful for debugging software too.16.17.1 Operational ModesThe logic analyser works in one of two modes of operation, namely the asynchronous timing mode andthe synchronous state mode. A brief description of each of these two modes is given in the followingparagraphs.16.17.1.1 Asynchronous Timing ModeIn this mode of operation, the signals being probed are recorded either as logic ‘0’ or logic ‘1’. Thelogic analyser provides the time base referred to as the ‘internal clock. The time base determines whendata values are clocked into the memory of the analyser. On screen, the asynchronous mode displaylooks similar to an oscilloscope display except for the number of channels that can be displayed, whichis much larger in the case of a logic analyser.16.17.1.2 Synchronous State ModeIn this mode of operation, samples of signals are stored in the memory on a clock edge, referred to asthe external clock, supplied by the system under investigation. The logic analyser samples new datavalues or states only when directed by the clock signal. On a given clock edge, the logic states ofvarious signals constitute a group. The logic analyser display in this mode shows progression of statesrepresented by these groups.16.17.2 Logic Analyser ArchitectureFigure 16.35 shows the block schematic arrangement of a logic analyser. Important constituents of alllogic analysers include probes, memory, trigger generator, clock generator, storage qualifier and userinterface.