Digital Electronics: Principles, Devices and Applications

174 Digital Electronicsthe conducting Q 1 . When the input is at −V DD or near −V DD , Q 2 conducts and the output goes tonear-zero potential (i.e. logic ‘1’).Figure 5.57(b) shows a PMOS logic based two-input NOR gate. In the logic arrangement ofFig. 5.57(b), the output goes to logic ‘1’ state (i.e. ground potential) only when both Q 1 and Q 2 areconducting. This is possible only when both the inputs are in logic ‘0’ state. For all other possibleinput combinations, the output is in logic ‘0’ state, because, with either Q 1 or Q 2 nonconducting, theoutput is nearly −V DD through the conducting Q 3 . The circuit of Fig. 5.57(b) thus behaves like atwo-input NOR gate in positive logic. It may be mentioned here that the MOSFET being used as load[Q 1 in Fig. 5.57(a) and Q 3 in Fig. 5.57(b)] is designed so as to have an ON-resistance that is muchgreater than the total ON-resistance of the MOSFETs being used as switches [Q 2 in Fig. 5.57(a) andQ 1 and Q 2 in Fig. 5.57(b)].5.7.2 NMOS LogicThe NMOS logic family uses N-channel MOSFETS. N-channel MOS devices require a smaller chiparea per transistor compared with P-channel devices, with the result that NMOS logic offers a higherdensity. Also, owing to the greater mobility of the charge carriers in N-channel devices, the NMOSlogic family offers higher speed too. It is for this reason that most of the MOS memory devices andmicroprocessors employ NMOS logic or some variation of it such as VMOS, DMOS and HMOS.VMOS, DMOS and HMOS are only structural variations of NMOS, aimed at further reducing thepropagation delay. Figures 5.58(a), (b) and (c) respectively show an inverter, a two-input NOR and atwo-input NAND using NMOS logic. The logic circuits are self-explanatory.5.8 Integrated Injection Logic (I 2 L) FamilyIntegrated injection logic (I 2 L), also known as current injection logic, is well suited to implementingLSI and VLSI digital functions and is a close competitor to the NMOS logic family. Figure 5.59shows the basic I 2 L family building block, which is a multicollector bipolar transistor with a currentsource driving its base. Transistors Q 3 and Q 4 constitute current sources. The magnitude of currentdepends upon externally connected R and applied +V . This current is also known as the injectioncurrent, which gives it its name of injection logic. If input A is HIGH, the injection current throughQ 3 flows through the base-emitter junction of Q 1 . Transistor Q 1 saturates and its collector drops toa low voltage, typically 50–100 mV. When A is LOW, the injection current is swept away from thebase-emitter junction of Q 1 . Transistor Q 1 becomes open and the injection current through Q 4 saturatesQ 2 , with the result that the Q 1 collector potential equals the base-emitter saturation voltage of Q 2 ,typically 0.7 V.The speed of I 2 L family devices is a function of the injection current I and improves with increase incurrent, as a higher current allows a faster charging of capacitive loads present at bases of transistors.The programmable injection current feature is made use of in the I 2 L family of digital ICs to choosethe desired speed depending upon intended application. The logic ‘0’ level is V CE (sat.) of the drivingtransistor (Q 1 in the present case), and the logic ‘1’ level is V BE (sat.) of the driven transistor (Q 2in the present case). Typically, the logic ‘0’ and logic ‘1’ levels are 0.1 and 0.7 V respectively. Thespeed–power product of the I 2 L family is typically under 1 pJ.Multiple collectors of different transistors can be connected together to form wired logic. Figure 5.60shows one such arrangement, depicting the generation of OR and NOR outputs of two logic variablesA and B.