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Digital Electronics: Principles, Devices and Applications

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Programmable Logic <strong>Devices</strong> 349ClockI/OsMacrocells<strong>and</strong> I/OpinsMacrocells<strong>and</strong> I/OpinsI/OsI/OsI/OsMacrocells<strong>and</strong> I/OpinsMacrocells<strong>and</strong> I/OpinsProgrammableInterconnectMatrix (PIM)Macrocells<strong>and</strong> I/OpinsMacrocells<strong>and</strong> I/OpinsI/OsI/OsI/OsMacrocells<strong>and</strong> I/OpinsMacrocells<strong>and</strong> I/OpinsI/OsFigure 9.40FLASH-370 CPLD architecture.9.12.3 FPGAsThere are two broad categories of FPGAs, namely SRAM-based FPGAs <strong>and</strong> antifuse-based FPGAs.While Xilinx <strong>and</strong> Altera are the major players in the former category, antifuse-based devices are offeredmainly by Xilinx, Actel, Quicklogic <strong>and</strong> Cypress. FPGAs were introduced by Xilinx with the XC-2000series of devices, which have been subsequently followed up by the XC-3000 series, XC-4000 series<strong>and</strong> XC-5000 series of devices. Of all these, the XC-4000 series is the most widely used one. Theseare all SRAM-based. Xilinx has also introduced an antifuse-based FPGA family of FPGAs calledXC-8100.The basic architecture of the XC-4000 family is built around a two-dimensional array of configurablelogic blocks (CLBs) that can be interconnected by horizontal <strong>and</strong> vertical routing channels <strong>and</strong> aresurrounded by a perimeter of programmable input/output blocks (IOBs). CLBs provide the functionalelements for constructing the user-desired logic function, <strong>and</strong> IOBs provide the interface betweenthe package pins <strong>and</strong> internal signal lines. These devices are reconfigurable <strong>and</strong> are in-systemprogrammable. Table 9.6 gives salient features of the XC-4000X <strong>and</strong> XC-4000E series of FPGAs.Altera offers the FLEX-8000 <strong>and</strong> FLEX-10000 series of FPGAs. FLEX-8000 is SRAM-based. Itcombines the fine-grained architecture <strong>and</strong> high register count characteristics of FPGAs with the highspeed <strong>and</strong> predictable interconnect timing delays of CPLDs. The basic logic element comprises afour-input look-up table (LUT) that provides combinational capability <strong>and</strong> a programmable registerthat provides sequential capability. Table 9.7 outlines salient features of the FLEX-8000 seriesof devices.The FLEX-10000 series offers all the features of FLEX-8000 series devices, with the addition ofvariable-sized blocks of SRAM called embedded array blocks (EABs). Each of the EABs can be

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