Digital Electronics: Principles, Devices and Applications

322 Digital ElectronicsProgrammable AND-arrayclockFQFFQOutputEnableFigure 9.20Output logic arrangements in a PAL device.Table 9.3PAL numbering system.Architecture – Combinational devicesArchitecture – Registered devicesCode Description Code DescriptionLetterletterH Active HIGH outputs R Registered outputsL Active LOW outputs X EXCLUSIVE-OR gatesP Programmable output polarity RP Registered polarityProgrammableC Complementary outputs RS Registered-term steeringXP EXCLUSIVE-OR gate- V Versatile variedProgrammableProduct termsS Product term steering RX Registered EX-ORMAMacrocellfrom combinational and registered outputs. For example, PAL-16L8 has 10 dedicated inputs and sixinputs accessible from I/O pins.In addition to the numbering system described above, an alphanumeric designation on the extremeleft may be used to indicate the technology used. ‘C’ stands for CMOS, ‘10H’ for 10KH ECL and‘100’ for 100K ECL. TTL is represented by a blank. A letter on the extreme right may be used to