Digital Electronics: Principles, Devices and Applications

Index 715Encoder 280–3EPROM 612, 628Equivalent of a Boolean expression 190Equivalent time sampling 669, 670Erasable Programmable Read Only Memory, seeEPROMError detection and correction codes 40–3cyclic redundancy check code 41–2Hamming code 42–3parity code 41repetition code 41Essential prime implicants 211Even parity 41Evolution of microprocessors 527–8Ex-NOR gate, see Exclusive-NOR gateEx-OR gate, see Exclusive-OR gateExcess-3 code 21–2Excitation table of a flip flop 438–9Exclusive-NOR gate 69, 80–1Exclusive-OR gate 69, 76–7Expanded form of Boolean expressions 206Expanding memory capacity 632–5memory location expansion 634–5word size expansion 632–3Exponent 12, 13Extended Binary Coded Decimal Interchange Code,see EBCDIC codeExtended data output (EDO) DRAM 622Fairchild Advanced schottky TTL, see Fast TTLFall time 121Fan-out 95–7, 98, 122Fast page mode (FPM) DRAM 622Fast TTL 116, 124, 140–1Fault detection 653, 654Fault isolation 653, 654Field programmable gate array, see FPGAField programmable logic array, see FPLAFireWire 638, 639Fixed logic 299–302Fixed logic device 300FLASH-370 CPLD 347, 349Flash A/D converter 500–3Flash memory 628–9, 630FLEX-10000 FPGA 349–50FLEX-8000 FPGA 349–50Flip flop 357, 373–408application relevant information 407–8applications 402–5D flip flop 394–5, 396, 397J–K flip flop 382–5, 387, 388, 391, 393, 395, 397master–slave flip flop 382–4, 388R-S flip flop 373–82timing parameters 399–402toggle flip flop 390–1, 392, 393Flip flop applications 402–5data storage and transfer circuits 402detecting the sequence of edges 404–5flip flop synchronizarion 404, 405frequency division and countingcircuits 402switch debouncing 402–4Flip flop synchronization 404, 405Flip flop timing parameters 399–402asynchronous input active pulse width 399, 401–2clock pulse HIGH time 399, 401clock pulse LOW time 399, 401clock transition times 399, 402hold time 399, 400maximum clock frequency 399, 402propagation delay 399, 401set-up time 399, 400Floating-gate transistor switch 334–5Floating inputs 141–2Floating-point addition 65Floating-point arithmetic 64–6addition 65division 65–6multiplication 65–6subtraction 65Floating-point division 65–6Floating-point multiplication 65–6Floating point number format 13–16ANSI/IEEE-754 format 13, 14–15IEEE-754r format 14, 15–16IEEE-854 standard 14, 16Floating point numbers 12–16exponent 12, 13formats 13–16mantissa 12, 13normalized binary numbers 13normalized numbers 12–13precision 13range of numbers 13significand, see MantissaFloating-point subtraction 65Floppy disk 647Floppy disk controller 560, 563Four axioms 11FPGA 307–8, 331–3, 349–52application relevant information 349–52applications 333internal architecture 331–3FPGA-applications 333FPGA-internal architecture 331–3