Digital Electronics: Principles, Devices and Applications

180 Digital Electronicsvoltage of 5 V, whereas the CMOS family devices can operate over a wide supply voltage range of3–18 V. In the present case, both ICs would operate from 5 V. As far as the voltage levels in the twologic states are concerned, the two have become compatible. The CMOS output has a V OH (min.) of4.95 V (for V CC = 5 V) and a V OL (max.) of 0.05 V, which is compatible with V IH (min.) and V IL (max.)requirements of approximately 2 and 0.8 V respectively for TTL family devices. In fact, in a CMOS-to-TTL interface, with the two devices operating on the same V CC , voltage level compatibility is alwaysthere. It is the current level compatibility that needs attention. That is, in the LOW state, the outputcurrent-sinking capability of the CMOS IC in question must at least equal the input current-sinkingrequirement of the TTL IC being driven. Similarly, in the HIGH state, the HIGH output current drivecapability of the CMOS IC must equal or exceed the HIGH-level input current requirement of TTLIC. For a proper interface, both the above conditions must be met. As a rule of thumb, a CMOS ICbelonging to the 4000B family (the most widely used CMOS family) can feed one LS TTL or twolow-power TTL unit loads. When a CMOS IC needs to drive a standard TTL or a Schottky TTLdevice, a CMOS buffer (4049B or 4050B) is used. 4049B and 4050B are hex buffers of invertingand noninverting types respectively, with each buffer capable of driving two standard TTL loads.Figure 5.62(a) shows a CMOS-to-TTL interface with both devices operating from 5 V supply and theCMOS IC driving a low-power TTL or a low-power Schottky TTL device. Figure 5.62(b) shows aCMOS-to-TTL interface where the TTL device in use is either a standard TTL or a Schottky TTL.The CMOS-to-TTL interface when the two are operating on different power supply voltages can beachieved in several ways. One such scheme is shown in Fig. 5.62(c). In this case, there is both avoltage level as well as a current level compatibility problem.5.12.2 TTL-to-CMOS InterfaceIn the TTL-to-CMOS interface, current compatibility is always there. The voltage level compatibility inthe two states is a problem. V OH (min.) of TTL devices is too low as regards the V IH (min.) requirementof CMOS devices. When the two devices are operating on the same power supply voltage, that is, 5 V,a pull-up resistor of 10 k achieves compatibility [Fig. 5.63(a)]. The pull-up resistor causes the TTLoutput to rise to about 5 V when HIGH. When the two are operating on different power supplies, oneof the simplest interface techniques is to use a transistor (as a switch) in-between the two, as shown inFig. 5.63(b). Another technique is to use an open collector type TTL buffer [Fig. 5.63(c)].5.12.3 TTL-to-ECL and ECL-to-TTL InterfacesTTL-to-ECL and ECL-to-TTL interface connections are not as straightforward as TTL-to-CMOS andCMOS-to-TTL connections owing to widely different power supply requirements for the two types andalso because ECL devices have differential inputs and differential outputs. Nevertheless, special chipsare available that can take care of all these aspects. These are known as level translators. MC10124is one such quad TTL-to-ECL level translator. That is, there are four independent single-input andcomplementary-output translators inside the chip. Figure 5.64(a) shows a TTL-to-ECL interface usingMC10124.MC10125 is a level translator for ECL-to-TTL interfaces; it has differential inputs and a single-endedoutput. Figure 5.64(b) shows a typical interface schematic using MC10125. Note that in the interfaceschematics of Figs 5.64(a) and (b), only one of the available four translators has been used.