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Carbon Nanotube Reinforced Composites: Metal and Ceramic ...

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Figure 3.5 DSC curvesshowing the shiftofmelting pointof(a) 63%<br />

Sn–37%Pb <strong>and</strong> (b) lead free Sn–3.8%Ag–0.7%Cu solder alloys<br />

tolower temperaturesbyaddingsingle-wall CNTs. Reproduced with<br />

permission from [27]. Copyright Ó (2006) Elsevier.<br />

3.2 Thermal Behavior of <strong>Metal</strong>-CNT Nanocompositesj97<br />

can also be reduced to the value close to that of the organic substrate or printed circuit<br />

board (PCB) by adding 0.3–0.5% SWNT (Table 3.3). As recognized, the main<br />

reliability issue of the flip chip packaging technique arises from the thermal stresses<br />

induced by CTE mismatch between the silicon chip <strong>and</strong> PCB. The low CTE value of

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