TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
EXTERNAL INTERRUPT TIMING<br />
SPRS294 − OCTOBER 2005<br />
timing requirements for external interrupts † (see Figure 50)<br />
NO.<br />
PYP-200,-225<br />
GDP/ZDP -225, -300<br />
PYPA -167, -200<br />
GDPA/ZDPA −200<br />
UNIT<br />
MIN MAX<br />
1 tw(ILOW)<br />
Width of the NMI interrupt pulse low 2P ns<br />
Width of the EXT_INT interrupt pulse low 4P ns<br />
2 tw(IHIGH)<br />
Width of the NMI interrupt pulse high 2P ns<br />
Width of the EXT_INT interrupt pulse high 4P ns<br />
† P = 1/CPU clock frequency in ns. For example, when running parts at 300 MHz, use P = 3.3 ns.<br />
EXT_INT, NMI<br />
1<br />
2<br />
Figure 50. External/NMI Interrupt Timing<br />
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443<br />
123
Change language