TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)

SIGNAL
NAME
PYP
PIN NO.
GDP/
ZDP
SPRS294A − OCTOBER 2005 − REVISED NOVEMBER 2005
Terminal Functions (Continued)
IPD/
TYPE†
IPU‡
DESCRIPTION
GENERAL-PURPOSE INPUT/OUTPUT (GPIO)
HD15/GP[15] 174 B14 IPU Host-port data pins (I/O/Z) [default] or general-purpose input/output pins
(I/O/Z) and some function as boot configuration pins at reset.
HD14/GP[14] 173 C14 IPU
• Used for transfer of data, address, and control
• Also controls initialization of DSP modes at reset via pullup/pulldown
HD13/GP[13] 172 A15 IPU
resistors
As general-purpose input/output (GP[x]) functions, these pins are software-configurable
HD12/GP[12] 168 C15
IPU
through registers. The “GPxEN” bits in the GP Enable register and the
I/O/Z
GPxDIR bits in the GP Direction register must be properly configured:
HD11/GP[11] 167 A16
IPU
GPxEN = 1; GP[x] pin is enabled.
HD10/GP[10] 166 B16 IPU GPxDIR = 0; GP[x] pin is an input.
GPxDIR = 1; GP[x] pin is an output.
HD9/GP[9] 165 C16 IPU
HD8/GP[8] 160 B17 IPU
For the functionality description of the Host-port data pins or the boot configuration
pins, see the Host-Port Interface (HPI) portion of this table.
GP[7](EXT_INT7) 7 E3 General-purpose input/output pins (I/O/Z) which also function as external
interrupts
GP[6](EXT_INT6) 2 D2
• Edge-driven
• Polarity independently selected via the External Interrupt Polarity Register
GP[5](EXT_INT5)/
AMUTEIN0
6 C1 I/O/Z IPU bits (EXTPOL.[3:0])
GP[4] and GP[5] pins also function as AMUTEIN1 McASP1 mute input and
GP[4](EXT_INT4)/
1 C2
AMUTEIN0 McASP0 mute input, respectively, if enabled by the INEN bit in the
AMUTEIN1
associated McASP AMUTE register.
HD7/GP[3] 164 A18 I/O/Z IPU
Host-port data pin 7 (I/O/Z) [default] or general-purpose input/output pin 3
(I/O/Z)
CLKOUT2/GP[2] 82 Y12 I/O/Z IPD
Clock output at half of device speed (O/Z) [default] or this pin can be
programmed as GP[2] pin.
HINT/GP[1] 135 J20 O IPU
Host interrupt (from DSP to host) (O) [default] or this pin can be programmed as
a GP[1] pin (I/O/Z).
HD4/GP[0] 156 C19 I/O/Z IPD
Host-port data pin 4 (I/O/Z) [ default] or this pin can be programmed as a GP[0]
pin (I/O/Z).
RESERVED FOR TEST
RSV 198 A5 O/Z IPU Reserved. (Leave unconnected, do not connect to power or ground)
RSV 200 B5 A§ Reserved. (Leave unconnected, do not connect to power or ground)
RSV 179 C12 O — Reserved. (Leave unconnected, do not connect to power or ground)
RSV — D7 O/Z IPD Reserved. (Leave unconnected, do not connect to power or ground)
RSV 178 D12 I —
RSV 181 A12 —
Reserved. This pin does not have an IPU. For proper device
operation, the D12 pin must be externally pulled down with a 10-kΩ resistor.
Reserved. [For new designs, it is recommended that this pin be connected directly
to CVDD (core power). For old designs, this can be left unconnected.
Reserved. [For new designs, it is recommended that this pin be connected directly
to Vss (ground). For old designs, this pin can be left unconnected.
RSV 180 B11 —
† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
‡ IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
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