TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)

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SPRS294A − OCTOBER 2005 − REVISED NOVEMBER 2005 SIGNAL DVDD NAME PYP PIN NO. GDP/ ZDP — A17 — B3 — B8 — B13 — C10 — D1 — D16 — D19 — F3 — H18 — J2 — M18 — R1 — R18 — T3 — U5 — U7 — U12 — U16 — V13 — V15 — V19 — W3 — W9 — W12 — Y7 — Y17 5 — 9 — 25 — 44 — 47 — 55 — 58 — 65 — 72 — 84 — 87 — 98 — TYPE† S Terminal Functions (Continued) SUPPLY VOLTAGE PINS DESCRIPTION 3.3-V supply voltage (see the power-supply decoupling portion of this data sheet) 107 — † I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal 58 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
SIGNAL NAME PYP PIN NO. GDP/ ZDP 114 — 126 — 141 — TYPE† DVDD 162 — S 183 — CVDD 188 — 206 — — A4 — A9 — A10 — B2 — B19 — C3 — C7 — C18 — D5 — D6 — D11 — D14 — D15 — F4 Terminal Functions (Continued) SUPPLY VOLTAGE PINS (CONTINUED) SPRS294A − OCTOBER 2005 − REVISED NOVEMBER 2005 DESCRIPTION 3.3-V supply voltage (see the power-supply decoupling portion of this data sheet) — F17 1.2-V supply voltage [PYP package] — K1 1.20-V supply voltage [GDP and ZDP packages] (See Note) S 1.4-V supply voltage [GDP and ZDP packages C6711D-300 only] — K4 (see the power-supply decoupling portion of this data sheet) — K17 — L4 — L17 — L20 — R4 — R17 — U6 — U10 — U11 — U14 — U15 — V3 — V18 — W2 Note: This value is compatible with existing 1.26-V designs. — W19 † I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 59
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SPRS294A − OCTOBER 2005 − REVIS
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REVISION HISTORY SPRS294A − OCTOB
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GDP and ZDP 272-Ball BGA package (b
Page 7 and 8: SPRS294A − OCTOBER 2005 − REVIS
Page 13 and 14: functional block and CPU (DSP core)
Page 15 and 16: Á Á Á Á Á Á ÁÁÁÁÁ ÁÁÁ
Page 35 and 36: DEVICE CONFIGURATIONS (CONTINUED) p
Page 37 and 38: DEVICE CONFIGURATIONS (CONTINUED) S
Page 39 and 40: MULTIPLEXED PINS NAME PYP GDP/ ZDP
Page 41 and 42: configuration examples (continued)
Page 47 and 48: DEVICE CONFIGURATIONS (CONTINUED) S
Page 49 and 50: SIGNAL NAME PYP PIN NO. GDP/ ZDP TY
Page 51 and 52: SIGNAL NAME PYP PIN NO. GDP/ ZDP HD
Page 53 and 54: SIGNAL NAME PYP PIN NO. GDP/ ZDP ED
Page 55 and 56: SIGNAL NAME PYP PIN NO. GDP/ ZDP TY
Page 57: SIGNAL NAME PYP PIN NO. GDP/ ZDP SP
Page 61 and 62: VSS SIGNAL NAME PYP PIN NO. GDP/ ZD
Page 63 and 64: VSS SIGNAL NAME PYP PIN NO. GDP/ ZD
Page 75 and 76: EDMA module and EDMA selector (cont
Page 77 and 78: PLL and PLL controller SPRS294A −
Page 85 and 86: multichannel audio serial port (McA
Page 87 and 88: multichannel audio serial port (McA
Page 99 and 100: SPRS294 − OCTOBER 2005 absolute m
Page 101 and 102: PARAMETER MEASUREMENT INFORMATION S
Page 103 and 104: PARAMETER MEASUREMENT INFORMATION (
Page 105 and 106: INPUT AND OUTPUT CLOCKS SPRS294 −
Page 107 and 108: INPUT AND OUTPUT CLOCKS (CONTINUED)
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ASYNCHRONOUS MEMORY TIMING (CONTINU
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SYNCHRONOUS-BURST MEMORY TIMING tim
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SYNCHRONOUS DRAM TIMING timing requ
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SYNCHRONOUS DRAM TIMING (CONTINUED)
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SYNCHRONOUS DRAM TIMING (CONTINUED)
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HOLD/HOLDA TIMING SPRS294 − OCTOB
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timing requirements for reset †
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EXTERNAL INTERRUPT TIMING SPRS294
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MULTICHANNEL AUDIO SERIAL PORT (McA
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INTER-INTEGRATED CIRCUITS (I2C) TIM
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HOST-PORT INTERFACE TIMING SPRS294
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HOST-PORT INTERFACE TIMING (CONTINU
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MULTICHANNEL BUFFERED SERIAL PORT T
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SPRS294 − OCTOBER 2005 switching
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GENERAL-PURPOSE INPUT/OUTPUT (GPIO)
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MECHANICAL DATA SPRS294 − OCTOBER
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SPRS294 − OCTOBER 2005 packaging
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MECHANICAL DATA MPBG274 - MAY 2002
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IMPORTANT NOTICE Texas Instruments
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TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)

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