TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)
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SPRS294 − OCTOBER 2005<br />
TIMER TIMING<br />
timing requirements for timer inputs † (see Figure 65)<br />
NO.<br />
PYP-200,-225<br />
GDP/ZDP -225, -300<br />
PYPA -167, -200<br />
GDPA/ZDPA −200<br />
UNIT<br />
MIN MAX<br />
1 tw(TINPH) Pulse duration, TINP high 2P ns<br />
2 tw(TINPL) Pulse duration, TINP low 2P ns<br />
† P = 1/CPU clock frequency in ns. For example, when running parts at 300 MHz, use P = 3.3 ns.<br />
switching characteristics over recommended operating conditions for timer outputs †<br />
(see Figure 65)<br />
NO.<br />
PARAMETER<br />
PYP-200,-225<br />
GDP/ZDP -225, -300<br />
PYPA -167, -200<br />
GDPA/ZDPA −200<br />
UNIT<br />
MIN MAX<br />
3 tw(TOUTH) Pulse duration, TOUT high 4P − 3 ns<br />
4 tw(TOUTL) Pulse duration, TOUT low 4P − 3 ns<br />
† P = 1/CPU clock frequency in ns. For example, when running parts at 300 MHz, use P = 3.3 ns.<br />
1<br />
2<br />
TINPx<br />
4<br />
3<br />
TOUTx<br />
Figure 65. Timer Timing<br />
142 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
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