TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)

More documents

Recommendations

Info

SPRS294 − OCTOBER 2005 The following table shows the thermal resistance characteristics for the PYP mechanical package. thermal resistance characteristics (S-PQFP-G208 package) for PYP NO Junction-to-Pad Two Signals, Two Planes (4-Layer Board) − 208-pin PYP °C/W 1 RΘJP Junction-to-pad, 26 x 26 copper pad on top and bottom of PCB with solder connection and vias going to GND plane, isolated from power plane. 0.2 Junction-to-Package Top Two Signals, Two Planes (4-Layer Board) − 208-pin PYP 2 PsiJT Junction-to-package top, 26 x 26 copper pad on top and bottom of PCB with solder connection and vias going to GND plane, isolated from power plane. 3 PsiJT Junction-to-package top, 7.5 x 7.5 copper pad on top and bottom of PCB with solder connection and vias going to GND plane, isolated from power plane. Two Signals (2-Layer Board) 4 PsiJT Junction-to-package top, 26 x 26 copper pad on top of PCB with solder connection and vias going to copper plane on bottom of board. 5 PsiJT Junction-to-package top, 7.5 x 7.5 copper pad on top of PCB with solder connection and vias going to copper plane on bottom of board. Junction-to-Still Air 0.18 0.23 0.18 0.23 Two Signals, Two Planes (4-Layer Board) − 208-pin PYP 6 RΘJA Junction-to-still air, 26 x 26 copper pad on top and bottom of PCB with solder connection and vias going to GND plane, isolated from power plane. 7 RΘJA Junction-to-still air, 7.5 x 7.5 copper pad on top and bottom of PCB with solder connection and vias going to GND plane, isolated from power plane. 13 20 Two Signals (2-Layer Board) 8 RΘJA Junction-to-still air, 26 x 26 copper pad on top of PCB with solder connection and vias going to copper plane on bottom of board. 9 RΘJA Junction-to-still air, 7.5 x 7.5 copper pad on top of PCB with solder connection and vias going to copper plane on bottom of board. 14 20 146 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
SPRS294 − OCTOBER 2005 packaging information For proper device thermal performance, the thermal pad must be soldered to an external ground thermal plane. This pad is electrically and thermally connected to the backside of the die. For the TMS320C6713B 208−Pin PowerPAD plastic quad flatpack, the external thermal pad dimensions are: 7.2 x 7.2 mm and the thermal pad is externally flush with the mold compound. The following packaging information and addendum reflect the most current released data available for the designated device(s). This data is subject to change without notice and without revision of this document. POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 147
Page 1 and 2:
SPRS294A − OCTOBER 2005 − REVIS
Page 3 and 4:
REVISION HISTORY SPRS294A − OCTOB
Page 5 and 6:
GDP and ZDP 272-Ball BGA package (b
Page 7 and 8:
Page 9 and 10:
Page 11 and 12:
Page 13 and 14:
functional block and CPU (DSP core)
Page 15 and 16:
Á Á Á Á Á Á ÁÁÁÁÁ ÁÁÁ
Page 17 and 18:
Page 19 and 20:
Page 21 and 22:
Page 23 and 24:
Page 25 and 26:
Page 27 and 28:
Page 29 and 30:
Page 31 and 32:
Page 33 and 34:
Page 35 and 36:
DEVICE CONFIGURATIONS (CONTINUED) p
Page 37 and 38:
DEVICE CONFIGURATIONS (CONTINUED) S
Page 39 and 40:
MULTIPLEXED PINS NAME PYP GDP/ ZDP
Page 41 and 42:
configuration examples (continued)
Page 43 and 44:
Page 45 and 46:
Page 47 and 48:
DEVICE CONFIGURATIONS (CONTINUED) S
Page 49 and 50:
SIGNAL NAME PYP PIN NO. GDP/ ZDP TY
Page 51 and 52:
SIGNAL NAME PYP PIN NO. GDP/ ZDP HD
Page 53 and 54:
SIGNAL NAME PYP PIN NO. GDP/ ZDP ED
Page 55 and 56:
SIGNAL NAME PYP PIN NO. GDP/ ZDP TY
Page 57 and 58:
SIGNAL NAME PYP PIN NO. GDP/ ZDP SP
Page 59 and 60:
SIGNAL NAME PYP PIN NO. GDP/ ZDP 11
Page 61 and 62:
VSS SIGNAL NAME PYP PIN NO. GDP/ ZD
Page 63 and 64:
VSS SIGNAL NAME PYP PIN NO. GDP/ ZD
Page 65 and 66:
Page 67 and 68:
Page 69 and 70:
Page 71 and 72:
Page 73 and 74:
Page 75 and 76:
EDMA module and EDMA selector (cont
Page 77 and 78:
PLL and PLL controller SPRS294A −
Page 79 and 80:
Page 81 and 82:
Page 83 and 84:
Page 85 and 86:
multichannel audio serial port (McA
Page 87 and 88:
multichannel audio serial port (McA
Page 89 and 90:
Page 91 and 92:
Page 93 and 94:
Page 95 and 96: SPRS294A − OCTOBER 2005 − REVIS
Page 97 and 98: SPRS294A − OCTOBER 2005 − REVIS
Page 99 and 100: SPRS294 − OCTOBER 2005 absolute m
Page 101 and 102: PARAMETER MEASUREMENT INFORMATION S
Page 103 and 104: PARAMETER MEASUREMENT INFORMATION (
Page 105 and 106: INPUT AND OUTPUT CLOCKS SPRS294 −
Page 107 and 108: INPUT AND OUTPUT CLOCKS (CONTINUED)
Page 109 and 110: ASYNCHRONOUS MEMORY TIMING (CONTINU
Page 111 and 112: SYNCHRONOUS-BURST MEMORY TIMING tim
Page 113 and 114: SYNCHRONOUS DRAM TIMING timing requ
Page 115 and 116: SYNCHRONOUS DRAM TIMING (CONTINUED)
Page 117 and 118: SYNCHRONOUS DRAM TIMING (CONTINUED)
Page 119 and 120: HOLD/HOLDA TIMING SPRS294 − OCTOB
Page 121 and 122: timing requirements for reset †
Page 123 and 124: EXTERNAL INTERRUPT TIMING SPRS294
Page 125 and 126: MULTICHANNEL AUDIO SERIAL PORT (McA
Page 127 and 128: INTER-INTEGRATED CIRCUITS (I2C) TIM
Page 129 and 130: HOST-PORT INTERFACE TIMING SPRS294
Page 131 and 132: HOST-PORT INTERFACE TIMING (CONTINU
Page 133 and 134: MULTICHANNEL BUFFERED SERIAL PORT T
Page 139 and 140: SPRS294 − OCTOBER 2005 switching
Page 143 and 144: GENERAL-PURPOSE INPUT/OUTPUT (GPIO)
Page 145: MECHANICAL DATA SPRS294 − OCTOBER
Page 149 and 150: MECHANICAL DATA MPBG274 - MAY 2002
Page 152: IMPORTANT NOTICE Texas Instruments
show all

TMS320C6713B Floating-Point Digital Signal Processor (Rev. A)

Create successful ePaper yourself

Delete template?

Save as template?