Semiconductor Equipment - Berenberg Bank

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Tokyo Electron Ltd Technology Hardware Figure 4: TEL is mainly exposed to legacy markets Market exposure High Growth markets 2012- 2017 CAGR % of revenue 2012 market share Low Growth/Declining markets Market exposure ASML Lithograhy +18% 100% 74% no exposure to low growth market 2012- 2017 CAGR % of revenue 2012 market share 2012- 2017 Growth CAGR 18.0% ASMI ALD deposition +15.0% 60% 45% LP CVD 1.0% 9% 51% Epitaxy +7.5% 17% 9% PE CVD +5.0% 14% 9% 91% 9% AMAT PE CVD +5.0% 19% 47% Ion implanter -2.5% 11% 76% Epitaxy +8.0% 11% 89% Dielectric etching 0.5% 1% 5% Silicon etching +4.0% 8% 14% PVD 0.0% 21% 78% CMP&cleaning +3.0% 6% 59% RTP Thermal -3.0% 7% 42% Process control +6.0% 9% 76% Wafer level packaging excl conta +12.0% 6% 9% Fab automation +4.0% 3% 16% 61% 39% KLA process control +6.0% 100% 54% no exposure to low growth market LAM Silicon etching +4.0% 50% 59% Dielectric etching 0.5% 14% 26% Metal etching +6.0% 4% LP CVD 1.0% 3% 10% Wafer level packaging excl conta +12.0% 1% Bevel edge removal -2.4% 3% 100% PE CVD +5.0% 15% 40% Cleaning (spin.spray processor) -2.0% 6% 15% ECD +4.0% 4% 74% 26% TEL ALD deposition +15.0% 6% 44% Photoresist processing 1.4% 34% 89% Silicon etch +4.0% 8% 9% LP CVD 1.0% 12% 51% WL packaging-excl contact prob +12.0% 5% 3% Dielectric etching 0.5% 20% 63% WL packaging- contact prob +3.0% 4% 39% RTP oxidisation/diffusion -1.5% 3% 22% Cleaning (spin.spray processor) -2.0% 9% 13% 23% 77% 11.1% 3.3% 6.0% 3.2% 2.4% Source: Gartner Data, <strong>Berenberg</strong> estimates Photoresist processing TEL generates 34% of its revenue from photoresist processing equipment. It had a dominant, 89% share of the global photoresist processing market in 2012, followed by its closest competitor Dainippon, with a 7% share (see Figure 5). Figure 5: Photoresist processing market share 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 2010 2011 2012 Source: Gartner Data TEL Dainippon SEMES Suss FSI In our opinion, the photoresist processing market is likely to underperform the total semiconductor capex over the next few years. Demand for photoresist processing equipment is associated with unit growth of lithography equipment, as each photoresist coater/developer usually supports one lithography tool. As the new generation of lithography tools becomes more efficient in terms of throughput, and demand for legacy tools declines, the total number of lithography 122
Tokyo Electron Ltd Technology Hardware tools is likely to grow at a slower pace. Gartner forecasts the photoresist processing market will grow by c1.4% between 2012 and 2017, versus growth in semiconductor capex of c4.1%. In 2015-16, when extreme ultraviolet lithography (EUV) starts to ship in volume, we may potentially see a higher top-line growth rate. The photoresist used for EUV is different from conventional lithography tools and requires a different type of photoresist equipment which may carry a high ASP. However, there is little visibility on revenue upside. Etching TEL generates 27% of its revenue from etching equipment, with a 29% market share globally in 2012. Some 85% of TEL’s etching revenue comes from shipping dielectric etching equipment, with the remainder from silicon etching equipment. It holds a dominant 63% share in the dielectric etching market, and a 9% share in silicon etching (LAM leads this market with a 59% share). Etching market trends have moved against TEL over the past two years (see Figure 6) as the total addressable market (TAM) for dielectric etching has fallen by c20%, while the silicon etching TAM increased by c4% between 2010 and 2012. Figure 6: Etching market solutions 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% Source: Gartner Data 2010 2011 2012 Bevel Edge removal Dielectric Etch Metal Etch Other Silicon Etch (including TSV) This trend should continue over the next few years, driven by new chip manufacturing processes including double patterning (DP) and FinFET in logic/foundry, and 3D NAND in memory. From a process point of view, DP uses more silicon etching steps than single patterning (SP), as does FinFET. The memory chip manufacturing process currently requires that 55% of etching steps are carried out using silicon etching technology, and this percentage is expected to rise to 60% for 3D NAND. As a result, TEL’s TAM may shrink at an accelerated pace in the near future, unless it can offset this loss by gaining market share in silicon etching. TEL aims to increase its overall market share in etching from 29% currently to 35% by 2015, as well as gain silicon etching market share. We remain sceptical about whether TEL can gain market share because the silicon etching market is crowded and competitive. LAM, Hitachi and AMAT all hold a bigger market share than TEL (Figure 7) and are currently shipping silicon etching tools to mainstream logic/foundries, while TEL is mainly supplying dielectric tools to these chipmakers. It would be hard for the latter to switch vendors due to process reconfiguration costs. 123
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Semiconductor Equipment - Berenberg Bank

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