memory products - Al Kossow's Bitsavers

TS27C64AQERASINGThe TS27C64A is erased by exposure to high intensityultraviolet light through the transparent window.This exposure discharges the floating gateto its initial state through induced photo current.It is recommended that the TS27C64A be kept outof direct sunlight. The UV content of sunlight maycause a partial erasure of some bits in a relativelyshort period of time. Direct sunlight can also causetemporary functional failure. Extended exposureto room level fluorescent lighting will also causeerasure. An opaque coating (paint, tape, label, etc.)should be placed over the package window if thisproduct is to be operated under these lighting conditions.Coverting the window also reduces ICC dueto photodiode currents. An ultraviolet source of2537 A yielding a total integrated dosage of 15 wattseconds/cm2is required. This will erase the partin approximately 15 to 20 minutes if a UV lamp witha 12,000 p.W/cm 2 power rating is used. TheTS27C64A to be erased should be placed 1 inchfrom the lamp and no filters should be used.An erasure system should be calibrated periodically.The disance from lamp to unit should be maintainedat 1 inch. The erasure time is increased bythe square of the distance (if the distance is doubledthe erasure time goes up by a factor of 4).Lamps lose intensity as they age. When a lamp ischanged, the distance, or the lamp is aged, the systemshould be checked to make certain full erasureis occuring. Incomplete erasure will causesymptoms that can be misleading. Programmers,components, and system designs have ben erroneouslysuspected when incomplete erasure wasthe basic problem.PROGRAMMING OPERATIONS(1)(T amb = 25 ± 5°C, VCC = 6.0V ± 0.25V, Vpp = 12.5V ± 0.3V)DC AND OPERATING CHARACTERISTICSSymbol Parameter Test ConditionsII Input Current (all inputs) VI = VIL or VIHMin.VIL Input Low Level (all inputs) -0.1VIH Input High Level 2.0VOL Output low voltage during verify IOL=2.1 mAVOH Output high voltage during verify IOH = - 400 p.A 2.4lee3 Vee Supply current(Program & Verify)IpP2 Vpp supply current (Program) CE=VIL=PGMAC CHARACTERISTICSSymbol Parameter Test ConditionstAS Address Set-up Time 2tOES OE Set-up Time 2tos Data Set-up Time 2tAH Address Hold Time 0tOH Data Hold Time 2tOFP Output enable to output float delay 0tvps Vpp set-up time 2tves Vee set-up time 2Min.ValuesTyp.Valuestpw PGM initial program pulse width 0.95 1.0top~2) PGM overprogram pulse width 2.85teES CE set-up time 2tOE Data valid from OENotes: 1. Vee must be applied simultaneously or before Vpp and removed simultaneously or after Vpp.2. topw is defined in flow chart.Typ.UnitMax.10 p.A0.8 VVee+ 1 V0.45 VV30 mA30 mAUnitMax.p'sp'sp'sp'sp's130 nsp'sp's1.05 ms78.75 msp's150 ns6/9116