memory products - Al Kossow's Bitsavers

M8571S-BUS TIMING DIAGRAMSDASCLSEN$-10128, SU 510 -1-44--S-BUS DESCRIPTIONThe S-BUS is a three-wire bidirectional data-buswith functional features similar to the 12C bus. Infact the S-BUS includes decoding of START/STOPconditions and the arbitration procedure in case ofmulti master system configuration. Both differenttransmission modes are shown in figures 2a and 2b.As it can be seen, the SDA line, in the 12C bus,represents the AND combination of SDA and SENlines in the S-BUS.If the SDA and the SEN lines of the S-BUS areshort-circuit connected, they appear as the SDAline of 12C bus.The START/STOP conditions (respectively points1 and 6) are detected (by the peripherals designedto work with S-BUS) by a transition of the SEN line(1- - >0/0- - >1) while the SCL line is at thehigh level.The SDA line is only allowed to change during thetime the SCL line is low (points 2, 3, 4, 5). Afterthe START information (point 1) the SEN linereturns to the high level and remains unchangedfor all the time the transmission is performed.When the transmission is completed (point 5) theSDA line is set to high level and, at the same time,the SEN line returns to the low level in order to supplythe STOP information with a low to high transition;while the SCL line is at high level.On the S-BUS, as on the 12C bus, each byte of eightbits is followed by one acknowledge bit which isa high level put on the SDA line by transmitter.A peripheral that acknowledges has to pull downthe SDA line during the acknowledge clock pulseas shown in Figure 3.SCLFIG. 1 - S-BUS CONFIGURATIONBinir\ ,,,\,,irFT-1 ! \.JJ . V \..J V W! 1: ::: :: : :~ ~--- ----J rn-:iL--11 ~iiI ,I I I I I I--h! ~-.----+---i i +SEN 1 \.LA. i· i ~ iI I,- __ JIIIIIIIII I1.. __ .JSCL1 2 3 5 6STARTSTOPFIG. 2 - I'C BUS CONFIGURATIONr--'--ti\fv', 1\JVt!~ : r-~~----. ... i! fiSOA i~ ~iL_JL_Jr--..,STARTFIG. 3 - ACKNOWLEDGESTOPSCL ~SOA ~,:i,1 ~SEN\ i '---11'-'\-,-'/-'----....,~ ~ ____ J~! I----------~I--------------! \l..Jl_JSTARTi4/11202