memory products - Al Kossow's Bitsavers

MK48T02/12(B)-12/15/20/25OPERATIONREAD MODEThe MK4ST02/12 is in the Read Mode wheneverW (Write Enable) is high and E (Chip Enable) is low.The device architecture allows ripple-through access(changing Addresses without removing ChipEnable) to any of the 2048 address locations in thestatic storage array. Valid data will be available atthe Data 1/0 pins within tAA after the I~t adQ!essinput signal is stable, providing that the E and G accesstimes are satisfied.If E or G access times are not yet met, valid datawill be available at the latter of Chip Enable AccessTime (tc;EA) or at Output Enable Access Time(tOEAl. The state of the ....!3ight three-state Data 1/0signals is controlled by E and G. If the Outputs areactivated before tAA, the data lines will be drivento an indeterminate state ..!Intil t~. If the Addressinputs are changed while E and G remain low, outputdata will remain valid for Output Data Hold Time(tOH) but will go indeterminant until the next tAA.FIGURE 3. READ-READ-WRITE TIMINGREADIRC~}(IRCREADIwcWRITE~C-rICEAi -IAAi -- r--- IAS l+-IWR::rlI IAW---1) ! !DOo-DO, ---------